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| author | Liya Li <ot_liya.li@mediatek.corp-partner.google.com> | 2022-07-23 14:23:04 +0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-07-29 15:05:48 +0000 |
| commit | 0d13e80852832368ac7ed51f8d04011a71ddbbc2 (patch) | |
| tree | 148e4ac63273f56f2e5bc769908e76b5cc7d21fd /src/mainboard/google/asurada | |
| parent | 00324b20e102f9f0f040077b584da12ba3fd699c (diff) | |
| download | coreboot-0d13e80852832368ac7ed51f8d04011a71ddbbc2.tar.gz coreboot-0d13e80852832368ac7ed51f8d04011a71ddbbc2.tar.bz2 coreboot-0d13e80852832368ac7ed51f8d04011a71ddbbc2.zip | |
soc/mediatek/mt8188: Add SPI support
The gpios and the tick delay register are different between MT8188
and previous MediaTek SoCs, so we need to add this patch to support
SPI.
TEST=build pass
BUG=b:236331724
Signed-off-by: Liya Li <ot_liya.li@mediatek.corp-partner.google.com>
Change-Id: I6065b9d285dfd36c191f274f500fdb694920276e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66185
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/asurada')
0 files changed, 0 insertions, 0 deletions