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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-06-30 15:57:05 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-07 13:48:07 +0000 |
| commit | e88989a5d42cf306b37e3d7c78013475c8338578 (patch) | |
| tree | 3398b26855c175678c98bd23d0878d6752cccea7 /src/mainboard/google/brya/acpi/power.asl | |
| parent | 0e582862c84751c1a517a294091c1eb1ae395543 (diff) | |
| download | coreboot-e88989a5d42cf306b37e3d7c78013475c8338578.tar.gz coreboot-e88989a5d42cf306b37e3d7c78013475c8338578.tar.bz2 coreboot-e88989a5d42cf306b37e3d7c78013475c8338578.zip | |
mb/google/brya/var/agah: Update FBVDD power-down delay
The EEs have observed the ramp down delay on this signal in more detail
and 40 ms can still meet the sequencing requirements.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I49ef801f7a3fd7945ded63da1399eaf57fd6aef0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65581
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/brya/acpi/power.asl')
| -rw-r--r-- | src/mainboard/google/brya/acpi/power.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/acpi/power.asl b/src/mainboard/google/brya/acpi/power.asl index e441530165cf..8232a32e565c 100644 --- a/src/mainboard/google/brya/acpi/power.asl +++ b/src/mainboard/google/brya/acpi/power.asl @@ -173,7 +173,7 @@ Method (PGOF, 0, Serialized) /* Ramp down FBVDD (active-low) and let rail discharge to <10% */ \_SB.PCI0.STXS (GPIO_FBVDD_PWR_EN) GPPL (GPIO_FBVDD_PG, 0, 20) - Sleep (150) + Sleep (40) /* Ramp down PEXVDD and let rail discharge to <10% */ \_SB.PCI0.CTXS (GPIO_PEXVDD_PWR_EN) |