summaryrefslogtreecommitdiffstats
path: root/src/mainboard/google/brya/romstage.c
diff options
context:
space:
mode:
authorEric Lai <ericr_lai@compal.corp-partner.google.com>2020-12-08 14:08:12 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-26 10:38:49 +0000
commit56868b8045aed351a2bb0fe74cd43cf78966c3ce (patch)
tree10335a07bd6472739d961b5065a9ce2c7a755c29 /src/mainboard/google/brya/romstage.c
parent3ebfd3fb1c8fdb4db75dfd1ed97eec8435c55141 (diff)
downloadcoreboot-56868b8045aed351a2bb0fe74cd43cf78966c3ce.tar.gz
coreboot-56868b8045aed351a2bb0fe74cd43cf78966c3ce.tar.bz2
coreboot-56868b8045aed351a2bb0fe74cd43cf78966c3ce.zip
mb/google/brya: Add memory DQ map
Add memory DQ map based on latest schematic. BUG=b:174266035 TEST=Build Test Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I94102240b13d2b95e0295f41bc2c0ba078faf242 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48446 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/romstage.c')
-rw-r--r--src/mainboard/google/brya/romstage.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c
index 341df1570e5d..475bf611485a 100644
--- a/src/mainboard/google/brya/romstage.c
+++ b/src/mainboard/google/brya/romstage.c
@@ -1,9 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
#include <fsp/api.h>
+#include <gpio.h>
#include <soc/romstage.h>
void mainboard_memory_init_params(FSPM_UPD *memupd)
{
- /* ToDo : Fill FSP-M memory params */
+ const struct mb_cfg *mem_config = variant_memory_params();
+ bool half_populated = variant_is_half_populated();
+
+ const struct mem_spd spd_info = {
+ .topo = MEM_TOPO_MEMORY_DOWN,
+ .cbfs_index = variant_memory_sku(),
+ };
+
+ memcfg_init(&memupd->FspmConfig, mem_config, &spd_info, half_populated);
}