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authorSubrata Banik <subratabanik@google.com>2022-02-16 16:25:32 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-02-18 14:54:07 +0000
commita55e5b773905209c0f41d17ab392f2c6743f3ff9 (patch)
treee59d543209e91d92d57dd022dd8caebd0ab4d195 /src/mainboard/google/brya/variants/agah/overridetree.cb
parentb832955161e978e7587e36feb01de354d5d14d6f (diff)
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mb/google/brya/var/agah: Use ACPI _PLD macro
This patch uses ACPI _PLD macros for USB Type A and C ports. BUG=b:216490477 TEST=emerge-brya coreboot Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Idb8f30b2d1069aea1d5ce7c5dda7f99de33a7c26 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61803 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/agah/overridetree.cb')
-rw-r--r--src/mainboard/google/brya/variants/agah/overridetree.cb24
1 files changed, 16 insertions, 8 deletions
diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb
index e200c54fd6b8..2f79831fe625 100644
--- a/src/mainboard/google/brya/variants/agah/overridetree.cb
+++ b/src/mainboard/google/brya/variants/agah/overridetree.cb
@@ -220,13 +220,15 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port3 on end
end
end
@@ -238,13 +240,15 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C0 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(1, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
device ref usb2_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- register "group" = "ACPI_PLD_GROUP(2, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
device ref usb2_port3 on end
end
chip drivers/usb/acpi
@@ -255,13 +259,15 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port 2""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(3, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 2))"
device ref usb2_port8 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port 0""
register "type" = "UPC_TYPE_A"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -274,13 +280,15 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port 0""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(3, 1)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port 2""
register "type" = "UPC_TYPE_USB3_A"
- register "group" = "ACPI_PLD_GROUP(3, 2)"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 2))"
device ref usb3_port2 on end
end
end