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| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2022-11-29 12:22:43 +0600 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-12-02 05:16:51 +0000 |
| commit | 7b1e7c30a7168f6f626b661d2a4647f6235e4f7f (patch) | |
| tree | 6b0e4dff31040d528cff2ea1300cd126a8838b81 /src/mainboard/google/brya/variants/anahera/overridetree.cb | |
| parent | cab2c53e3cabb16d662dc45c43c141e2d9a89ce9 (diff) | |
| download | coreboot-7b1e7c30a7168f6f626b661d2a4647f6235e4f7f.tar.gz coreboot-7b1e7c30a7168f6f626b661d2a4647f6235e4f7f.tar.bz2 coreboot-7b1e7c30a7168f6f626b661d2a4647f6235e4f7f.zip | |
mb/google/brya/var/anahera: Adjust I2C5 timing for touchpad
Adjust scl_lcnt, scl_hcnt, sda_hold value for I2C5 to meet
touchpad SPEC.
BUG=b:260540852
BRANCH=firmware-brya-14505.B
TEST=build, checked TP function work normally,
and measure the timing meet SPEC
tLOW ~1.72 us
tHIGH ~0.63 us
tHD ~0.69 us
fscl 383 kHz
Change-Id: I9036a604a90558911c4f8a492db9f1f0f28bf404
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/anahera/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera/overridetree.cb | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index df7f63248a9f..1773e0ee5277 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -66,7 +66,12 @@ chip soc/intel/alderlake .speed = I2C_SPEED_FAST, .rise_time_ns = 650, .fall_time_ns = 400, - .data_hold_time_ns = 50, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 170, + .scl_hcnt = 70, + .sda_hold = 40, + } }, }" register "tcc_offset" = "3" # TCC of 97C |