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| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-08-05 15:29:22 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-17 19:46:07 +0000 |
| commit | 9022344cde972437f14a8516abd7354acbdad136 (patch) | |
| tree | 579708fd1f21199fcb171c5970538513b37d67ef /src/mainboard/google/brya/variants/ghost/gpio.c | |
| parent | c760e41a414d2c1aec31982530944bae62c828f0 (diff) | |
| download | coreboot-9022344cde972437f14a8516abd7354acbdad136.tar.gz coreboot-9022344cde972437f14a8516abd7354acbdad136.tar.bz2 coreboot-9022344cde972437f14a8516abd7354acbdad136.zip | |
mb/google/brya/var/ghost: Enable NXP UWB SR150 chip
Add GPIO configuration and device tree to enable the chip.
BUG=b:240607130
BRANCH=firmware-brya-14505.B
TEST=Patch linux with NXP's pending drivers
UWB device is probed and can respond to a simple hello packet
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I83be712d243c365a5cbfe6f69a6bd85440c5bec7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/ghost/gpio.c')
| -rw-r--r-- | src/mainboard/google/brya/variants/ghost/gpio.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/brya/variants/ghost/gpio.c b/src/mainboard/google/brya/variants/ghost/gpio.c index 73d6c7b025af..1240803fb068 100644 --- a/src/mainboard/google/brya/variants/ghost/gpio.c +++ b/src/mainboard/google/brya/variants/ghost/gpio.c @@ -46,16 +46,16 @@ static const struct pad_config gpio_table[] = { /* GPP_A4 : GPP_A4 ==> ESPI_PCH_CS_EC_R_L configured on reset, do not touch */ /* GPP_A5 : GPP_A5 ==> ESPI_ALERT0 configured on reset, do not touch */ /* GPP_A6 : GPP_A6 ==> ESPI_ALERT1 configured on reset, do not touch */ - /* GPP_A7 : No heuristic was found useful */ - PAD_NC(GPP_A7, NONE), + /* GPP_A7 : PCH_UWB_WAKE */ + PAD_CFG_GPO(GPP_A7, 0, DEEP), /* GPP_A8 : HP_RST_ODL */ PAD_CFG_GPO(GPP_A8, 1, PLTRST), /* GPP_A9 : GPP_A9 ==> ESPI_PCH_CLK_R configured on reset, do not touch */ /* GPP_A10 : GPP_A10 ==> ESPI_PCH_RST_EC_L configured on reset, do not touch */ /* GPP_A11 : [NF6: USB_C_GPP_A11] ==> EN_SPKR_PA */ PAD_CFG_GPO(GPP_A11, 1, DEEP), - /* GPP_A12 : No heuristic was found useful */ - PAD_NC(GPP_A12, NONE), + /* GPP_A12 : EN_PP1800_UWB */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* GPP_A13 : [NF6: USB_C_GPP_A13] ==> GSC_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), /* GPP_A14 : [NF1: USB_OC1# NF2: DDSP_HPD3 NF4: DISP_MISC3 NF6: USB_C_GPP_A14] ==> USB_C1_OC_ODL */ @@ -258,8 +258,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_F19, NONE, DEEP, NF6), /* GPP_F20 : [] ==> UCAM_RST_L */ PAD_CFG_GPO(GPP_F20, 0, DEEP), - /* GPP_F21 : No heuristic was found useful */ - PAD_NC(GPP_F21, NONE), + /* GPP_F21 : UWB_PCH_INT */ + PAD_CFG_GPI_INT(GPP_F21, NONE, PLTRST, LEVEL), /* GPP_F22 : No heuristic was found useful */ PAD_NC(GPP_F22, NONE), /* GPP_F23 : No heuristic was found useful */ |