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| author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2021-08-04 17:34:17 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-08-09 15:04:29 +0000 |
| commit | cc1a9b5c15d687573ac68ab8b6d3691ad27ceb2a (patch) | |
| tree | 44d7b49e97657ab37a0fcd829f77049caffd1144 /src/mainboard/google/brya/variants/gimble | |
| parent | 6108321c334228d2f22682694ebb212751809549 (diff) | |
| download | coreboot-cc1a9b5c15d687573ac68ab8b6d3691ad27ceb2a.tar.gz coreboot-cc1a9b5c15d687573ac68ab8b6d3691ad27ceb2a.tar.bz2 coreboot-cc1a9b5c15d687573ac68ab8b6d3691ad27ceb2a.zip | |
gimble: enable elan touchscreen
Enable Elan touchscreen and remove Goodix touchscreen. We also get confirmation by Elan that address is 0x15.
BUG=b:195494292
BRANCH=none
TEST=build coreboot and dmesg | grep hid, it showed i2c-ELAN9050:00.
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: I20a7fd0b370803c14990b77bab302727af197ccb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56801
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/gimble')
| -rw-r--r-- | src/mainboard/google/brya/variants/gimble/overridetree.cb | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb index 101e472d09e2..49626aa6129f 100644 --- a/src/mainboard/google/brya/variants/gimble/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb @@ -125,23 +125,23 @@ chip soc/intel/alderlake end #I2C0 device ref i2c1 on chip drivers/i2c/hid - register "generic.hid" = ""GDIX0000"" - register "generic.desc" = ""Goodix Touchscreen"" + register "generic.hid" = ""ELAN9050"" + register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" register "generic.probed" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" - register "generic.reset_delay_ms" = "120" - register "generic.reset_off_delay_ms" = "3" + register "generic.reset_delay_ms" = "300" + register "generic.reset_off_delay_ms" = "1" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" - register "generic.enable_delay_ms" = "12" + register "generic.enable_delay_ms" = "6" register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" register "generic.stop_off_delay_ms" = "1" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" - device i2c 0x5d on end + device i2c 0x15 on end end end device ref i2c5 on |