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| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2021-10-28 13:26:15 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-29 16:53:14 +0000 |
| commit | 287cc02c007fd47b515d19389ea00ea0461fd5a1 (patch) | |
| tree | 81be4eed4b976e7690c89fd593dffd10b0de7b65 /src/mainboard/google/brya/variants/kano/overridetree.cb | |
| parent | 9c30a2944beaa325750fcdfaab1129871407d0b9 (diff) | |
| download | coreboot-287cc02c007fd47b515d19389ea00ea0461fd5a1.tar.gz coreboot-287cc02c007fd47b515d19389ea00ea0461fd5a1.tar.bz2 coreboot-287cc02c007fd47b515d19389ea00ea0461fd5a1.zip | |
mb/google/brya/var/kano: disabled autonomous GPIO power management
Used H1 firmware where the last version number is 0.0.22, 0.3.22 or
less to production that will need to disable autonomous GPIO power
management and then can get H1 version by gsctool -a -f -M
BUG=b:201266532
TEST=FW_NAME=kano emerge-brya coreboot and verify it builds
without error.
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: If6783e0df1404c9a353061fb564210aa0d12896e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/kano/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brya/variants/kano/overridetree.cb | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index 899dd36f6fca..e650042549f9 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -15,6 +15,17 @@ end chip soc/intel/alderlake register "SaGv" = "SaGv_Enabled" + # This disabled autonomous GPIO power management, otherwise + # old cr50 FW only supports short pulses; need to clarify + # the minimum PCH IRQ pulse width with Intel, b/180111628 + register "gpio_override_pm" = "1" + register "gpio_pm[COMM_0]" = "0" + register "gpio_pm[COMM_1]" = "0" + register "gpio_pm[COMM_2]" = "0" + register "gpio_pm[COMM_3]" = "0" + register "gpio_pm[COMM_4]" = "0" + register "gpio_pm[COMM_5]" = "0" + # FIVR configurations for kano are disabled since the board doesn't have V1p05 and Vnn # bypass rails implemented. register "ext_fivr_settings" = "{ |