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| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2022-05-31 11:51:46 +0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-06-01 15:33:48 +0000 |
| commit | e18e1f9af536ce6b4d0ad06dd69a9b196afba74c (patch) | |
| tree | ec40f920ed3c13eee339d67544da235d9e02dce1 /src/mainboard/google/brya/variants/kinox | |
| parent | fdf6d121f5382d116fd9d408525635348d64dd69 (diff) | |
| download | coreboot-e18e1f9af536ce6b4d0ad06dd69a9b196afba74c.tar.gz coreboot-e18e1f9af536ce6b4d0ad06dd69a9b196afba74c.tar.bz2 coreboot-e18e1f9af536ce6b4d0ad06dd69a9b196afba74c.zip | |
mb/google/brya/var/kinox: Set memory SMBus addresses based on board rev
Starting with id 2, boards switched the memory SMBus slave address, and
use 0x50, 0x52.
BUG=b:233975373
TEST=Build and boot to Chrome OS
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I5e683ffdbc0727259ee796610cd97a6e378bf335
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ricky Chang <rickytlchang@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/kinox')
| -rw-r--r-- | src/mainboard/google/brya/variants/kinox/memory.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/kinox/memory.c b/src/mainboard/google/brya/variants/kinox/memory.c index f9790358335d..01a997e78fc0 100644 --- a/src/mainboard/google/brya/variants/kinox/memory.c +++ b/src/mainboard/google/brya/variants/kinox/memory.c @@ -2,6 +2,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> +#include <boardid.h> #include <gpio.h> #include <soc/romstage.h> @@ -32,7 +33,14 @@ const struct mb_cfg *variant_memory_params(void) void variant_get_spd_info(struct mem_spd *spd_info) { + const uint32_t id = board_id(); spd_info->topo = MEM_TOPO_DIMM_MODULE; - spd_info->smbus[0].addr_dimm[0] = 0x52; - spd_info->smbus[1].addr_dimm[0] = 0x50; + + if (id >= 2) { + spd_info->smbus[0].addr_dimm[0] = 0x50; + spd_info->smbus[1].addr_dimm[0] = 0x52; + } else { + spd_info->smbus[0].addr_dimm[0] = 0x52; + spd_info->smbus[1].addr_dimm[0] = 0x50; + } } |