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| author | Reka Norman <rekanorman@google.com> | 2022-01-28 16:52:13 +1100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-03 14:50:04 +0000 |
| commit | 3c5da531ce7a062923d6b8e33da6982a34107231 (patch) | |
| tree | 7305d04870e59ea0b8885d46705b12605b22c456 /src/mainboard/google/brya/variants/nereid | |
| parent | 0db4247b9fd6aff139e4df3cdef05906cf6fcfe0 (diff) | |
| download | coreboot-3c5da531ce7a062923d6b8e33da6982a34107231.tar.gz coreboot-3c5da531ce7a062923d6b8e33da6982a34107231.tar.bz2 coreboot-3c5da531ce7a062923d6b8e33da6982a34107231.zip | |
mb/google/brya: Add SPD configs for nivviks and nereid
Add a mem_parts_used.txt for each of nivviks and nereid, containing the
memory parts used in their pre-proto builds. Generate Makefile.inc and
dram_id.generated.txt using part_id_gen.
nivviks:
Micron MT62F1G32D4DR-031 WT:B
nereid:
Samsung K3LKBKB0BM-MGCP
BUG=b:197479026
TEST=Build nivviks and nereid. Use cbfstool to check that coreboot.rom
contains an spd.bin.
Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Ia3e5ee22199371980d3c1bf85e95e067d3c73e67
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61443
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/nereid')
3 files changed, 26 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/nereid/memory/Makefile.inc b/src/mainboard/google/brya/variants/nereid/memory/Makefile.inc new file mode 100644 index 000000000000..f39c69afe89a --- /dev/null +++ b/src/mainboard/google/brya/variants/nereid/memory/Makefile.inc @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/nereid/memory src/mainboard/google/brya/variants/nereid/memory/mem_parts_used.txt + +SPD_SOURCES = +SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 0(0b0000) Parts = K3LKBKB0BM-MGCP diff --git a/src/mainboard/google/brya/variants/nereid/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/nereid/memory/dram_id.generated.txt new file mode 100644 index 000000000000..cce733cf51e5 --- /dev/null +++ b/src/mainboard/google/brya/variants/nereid/memory/dram_id.generated.txt @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/nereid/memory src/mainboard/google/brya/variants/nereid/memory/mem_parts_used.txt + +DRAM Part Name ID to assign +K3LKBKB0BM-MGCP 0 (0000) diff --git a/src/mainboard/google/brya/variants/nereid/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/nereid/memory/mem_parts_used.txt new file mode 100644 index 000000000000..c092a5f9f446 --- /dev/null +++ b/src/mainboard/google/brya/variants/nereid/memory/mem_parts_used.txt @@ -0,0 +1,12 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.inc and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name +K3LKBKB0BM-MGCP |