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| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2022-01-11 18:07:20 +0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-01-14 17:54:48 +0000 |
| commit | dc6071d2ce22d8ed0bd92162484e864dadace87a (patch) | |
| tree | 3063ba34db700eda3a83c258526696e9b97cde80 /src/mainboard/google/brya/variants/redrix/overridetree.cb | |
| parent | c98df1478b7a00e1a56b421ced001f6876da07dd (diff) | |
| download | coreboot-dc6071d2ce22d8ed0bd92162484e864dadace87a.tar.gz coreboot-dc6071d2ce22d8ed0bd92162484e864dadace87a.tar.bz2 coreboot-dc6071d2ce22d8ed0bd92162484e864dadace87a.zip | |
mb/google/brya/var/redrix{4es}: Set tcc_offset value to 3
The redrix thermal team has determined that the TCC circuit trip
temperature should be set to 97C, therefore, because the offset
is subtracted from 100C, set the `tcc_offset` register in the
devicetree to 3.
BUG=b:200134784
TEST=build and verified by thermal team
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Change-Id: Ifb63d63bc741b2a402328f256b43bc83e0a88a9e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61003
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/redrix/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brya/variants/redrix/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index a94f33325bc5..0cb0102c6116 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -86,6 +86,7 @@ chip soc/intel/alderlake .data_hold_time_ns = 50, }, }" + register "tcc_offset" = "3" # TCC of 97C device domain 0 on device ref igpu on chip drivers/gfx/generic |