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author | Shon Wang <shon.wang@quanta.corp-partner.google.com> | 2021-12-24 10:45:15 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-18 15:39:08 +0000 |
commit | 8d296b1eba3323ac5ece086913c7b94c9d4f7b71 (patch) | |
tree | 5f1f8b8450918fbb4162758fb29e91a7dc588d28 /src/mainboard/google/brya/variants/vell/gpio.c | |
parent | 7cd505873b57e5712c1193a737c0a39820665d38 (diff) | |
download | coreboot-8d296b1eba3323ac5ece086913c7b94c9d4f7b71.tar.gz coreboot-8d296b1eba3323ac5ece086913c7b94c9d4f7b71.tar.bz2 coreboot-8d296b1eba3323ac5ece086913c7b94c9d4f7b71.zip |
mb/google/brya/var/vell: Change AMP driver setting
1.Change I2S GPP_Sx (S0-S3) Native PAD Configuration from NF2 to NF4
2.Select CS35l53 AMP driver for Vell variant.
Change-Id: I96d49bd1a2ba061c4fd52b450b31d0885f49552c
Signed-off-by: Shon.Wang <shon.wang@quanta.corp-partner.google.com>
Signed-off-by: Vitaly Rodionov <vitaly.rodionov@cirrus.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/vell/gpio.c')
-rw-r--r-- | src/mainboard/google/brya/variants/vell/gpio.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/vell/gpio.c b/src/mainboard/google/brya/variants/vell/gpio.c index e6588b9f85d8..e9600da09d73 100644 --- a/src/mainboard/google/brya/variants/vell/gpio.c +++ b/src/mainboard/google/brya/variants/vell/gpio.c @@ -72,13 +72,13 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_R7, NONE), /* S0 : SNDW0_CLK ==> I2S_SPKR_SCLK_R */ - PAD_CFG_NF(GPP_S0, NONE, DEEP, NF2), + PAD_CFG_NF(GPP_S0, NONE, DEEP, NF4), /* S1 : SNDW0_DATA ==> I2S_SPKR_SFRM_R */ - PAD_CFG_NF(GPP_S1, NONE, DEEP, NF2), + PAD_CFG_NF(GPP_S1, NONE, DEEP, NF4), /* S2 : SNDW1_CLK ==> DMIC_CLK0_R */ - PAD_CFG_NF(GPP_S2, NONE, DEEP, NF3), + PAD_CFG_NF(GPP_S2, NONE, DEEP, NF4), /* S3 : SNDW1_DATA ==> I2S_PCH_RX_SPKR_TX */ - PAD_CFG_NF(GPP_S3, NONE, DEEP, NF3), + PAD_CFG_NF(GPP_S3, NONE, DEEP, NF4), /* S4 : SNDW2_CLK ==> NC */ PAD_NC(GPP_S4, NONE), /* S5 : SNDW2_DATA ==> NC */ |