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| author | Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> | 2022-07-19 16:55:28 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-22 13:12:21 +0000 |
| commit | 3132a5fb89f3149bec7ee00e2121ee16a3436567 (patch) | |
| tree | 735ec30b522da7000d602aa7039649ef94bfe60e /src/mainboard/google/brya/variants | |
| parent | d00048fe564aa54b042c2ee51d6918c91cd28610 (diff) | |
| download | coreboot-3132a5fb89f3149bec7ee00e2121ee16a3436567.tar.gz coreboot-3132a5fb89f3149bec7ee00e2121ee16a3436567.tar.bz2 coreboot-3132a5fb89f3149bec7ee00e2121ee16a3436567.zip | |
Revert "mb/google/brya/var/kinox: Configure TDC current"
This reverts commit 58f68fb0cb8e9824256a115d1ebdc840c281e987.
Reason for revert: ODM thermal team request that change IA/GT TDC
current back to 20A.
BUG=b:237230877
TEST=Build and boot to Chrome OS
Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: I6a5cfdc18afb6fe43a3d630e5fa3d77c19640fc2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Baieswara Reddy Sagili <baieswara.reddy.sagili@intel.corp-partner.google.com>
Reviewed-by: Vinay Kumar <vinay.kumar@intel.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Reviewed-by: John Su <john_su@compal.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants')
| -rw-r--r-- | src/mainboard/google/brya/variants/kinox/overridetree.cb | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/src/mainboard/google/brya/variants/kinox/overridetree.cb b/src/mainboard/google/brya/variants/kinox/overridetree.cb index a9962df90d53..95eba1f5e606 100644 --- a/src/mainboard/google/brya/variants/kinox/overridetree.cb +++ b/src/mainboard/google/brya/variants/kinox/overridetree.cb @@ -12,32 +12,6 @@ chip soc/intel/alderlake # GPE configuration register "pmc_gpe0_dw1" = "GPP_H" - # +-----------+-------+-------+---------+-------------+----------+ - # | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time | - # | |(mOhms)|(mOhms)| (A) | (A) | (msec) | - # +-----------+-------+-------+---------+-------------+----------+ - # | IA | 2.8 | 2.8 | 80 | 43 | 28000 | - # +-----------+-------+-------+---------+-------------+----------+ - # | GT | 3.2 | 3.2 | 40 | 23 | 28000 | - # +-----------+-------+-------+---------+-------------+----------+ - register "domain_vr_config[VR_DOMAIN_IA]" = "{ - .vr_config_enable = 1, - .ac_loadline = 280, - .dc_loadline = 280, - .icc_max = VR_CFG_AMP(80), - .tdc_timewindow = 28000, - .tdc_currentlimit = VR_CFG_TDC_AMP(43), - }" - - register "domain_vr_config[VR_DOMAIN_GT]" = "{ - .vr_config_enable = 1, - .ac_loadline = 320, - .dc_loadline = 320, - .icc_max = VR_CFG_AMP(40), - .tdc_timewindow = 28000, - .tdc_currentlimit = VR_CFG_TDC_AMP(23), - }" - # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |