mb/google/brya: Enable FSP UPD LpDdrDqDqsReTraining

FSP default value for LpDdrDqDqsReTraining is 1. For boards
that didn't set LpDdrDqDqsReTraining to any value, 0 was being
assigned and it caused black screen issue.

BUG=b:302465393
TEST=Boot to OS with debug FSP, check LpDdrDqDqsReTraining = 1

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I301a6e43f2944ffbc63431393378ab8b23450032
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>

19 files changed, 44 insertions, 0 deletions

diff --git a/src/mainboard/google/brya/variants/agah/memory.c b/src/mainboard/google/brya/variants/agah/memory.c
index ef5e69a0644b..b36e78f0e32b 100644
--- a/src/mainboard/google/brya/variants/agah/memory.c
+++ b/src/mainboard/google/brya/variants/agah/memory.c
@@ -61,6 +61,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
diff --git a/src/mainboard/google/brya/variants/aurash/memory.c b/src/mainboard/google/brya/variants/aurash/memory.c
index ad33e9c9c710..3ac4bb8c69c9 100644
--- a/src/mainboard/google/brya/variants/aurash/memory.c
+++ b/src/mainboard/google/brya/variants/aurash/memory.c
@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
diff --git a/src/mainboard/google/brya/variants/banshee/memory.c b/src/mainboard/google/brya/variants/banshee/memory.c
index 7371f57a7092..125e90902ea3 100644
--- a/src/mainboard/google/brya/variants/banshee/memory.c
+++ b/src/mainboard/google/brya/variants/banshee/memory.c
@@ -14,6 +14,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/memory.c b/src/mainboard/google/brya/variants/baseboard/brask/memory.c
index 447328b2cad3..b77a7125e79e 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/memory.c
+++ b/src/mainboard/google/brya/variants/baseboard/brask/memory.c
@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/memory.c b/src/mainboard/google/brya/variants/baseboard/brya/memory.c
index bcad9b4be92d..e074fea56b3c 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/memory.c
+++ b/src/mainboard/google/brya/variants/baseboard/brya/memory.c
@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
diff --git a/src/mainboard/google/brya/variants/baseboard/hades/memory.c b/src/mainboard/google/brya/variants/baseboard/hades/memory.c
index 29e3084051e9..742ce7fe3a72 100644
--- a/src/mainboard/google/brya/variants/baseboard/hades/memory.c
+++ b/src/mainboard/google/brya/variants/baseboard/hades/memory.c
@@ -16,6 +16,8 @@ static const struct mb_cfg ddr5_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
diff --git a/src/mainboard/google/brya/variants/constitution/memory.c b/src/mainboard/google/brya/variants/constitution/memory.c
index b68ec2125ab0..c3999501775b 100644
--- a/src/mainboard/google/brya/variants/constitution/memory.c
+++ b/src/mainboard/google/brya/variants/constitution/memory.c
@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 1, .dqs1 = 0 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
diff --git a/src/mainboard/google/brya/variants/crota/memory.c b/src/mainboard/google/brya/variants/crota/memory.c
index 7c6fc243070c..2573229fe584 100644
--- a/src/mainboard/google/brya/variants/crota/memory.c
+++ b/src/mainboard/google/brya/variants/crota/memory.c
@@ -67,6 +67,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ccc_config = 0xff,
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 };
diff --git a/src/mainboard/google/brya/variants/gaelin/memory.c b/src/mainboard/google/brya/variants/gaelin/memory.c
index 98b655c1005e..9799ae089c1e 100644
--- a/src/mainboard/google/brya/variants/gaelin/memory.c
+++ b/src/mainboard/google/brya/variants/gaelin/memory.c
@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
diff --git a/src/mainboard/google/brya/variants/kano/memory.c b/src/mainboard/google/brya/variants/kano/memory.c
index c81f8cc21f62..31837086f82c 100644
--- a/src/mainboard/google/brya/variants/kano/memory.c
+++ b/src/mainboard/google/brya/variants/kano/memory.c
@@ -63,6 +63,8 @@ static const struct mb_cfg kano_memcfg = {
 		.ddr7 = { .dqs0 = 1, .dqs1 = 0 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
@@ -125,6 +127,8 @@ static const struct mb_cfg hynix_memcfg = {
 		.ddr7 = { .dqs0 = 1, .dqs1 = 0 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 
 	.cs_pi_start_high_in_ect = 1,
diff --git a/src/mainboard/google/brya/variants/kinox/memory.c b/src/mainboard/google/brya/variants/kinox/memory.c
index 01a997e78fc0..e9aaea19251a 100644
--- a/src/mainboard/google/brya/variants/kinox/memory.c
+++ b/src/mainboard/google/brya/variants/kinox/memory.c
@@ -17,6 +17,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
diff --git a/src/mainboard/google/brya/variants/marasov/memory.c b/src/mainboard/google/brya/variants/marasov/memory.c
index 764a4adc8804..79a1296445ff 100644
--- a/src/mainboard/google/brya/variants/marasov/memory.c
+++ b/src/mainboard/google/brya/variants/marasov/memory.c
@@ -65,6 +65,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ccc_config = 0xff,
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_ULT_ULX,
diff --git a/src/mainboard/google/brya/variants/moli/memory.c b/src/mainboard/google/brya/variants/moli/memory.c
index ad33e9c9c710..3ac4bb8c69c9 100644
--- a/src/mainboard/google/brya/variants/moli/memory.c
+++ b/src/mainboard/google/brya/variants/moli/memory.c
@@ -16,6 +16,8 @@ static const struct mb_cfg ddr4_mem_config = {
 		.targets = {50, 20, 25, 25, 25},
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
diff --git a/src/mainboard/google/brya/variants/omnigul/memory.c b/src/mainboard/google/brya/variants/omnigul/memory.c
index f72b729e900e..69db23d2abd1 100644
--- a/src/mainboard/google/brya/variants/omnigul/memory.c
+++ b/src/mainboard/google/brya/variants/omnigul/memory.c
@@ -67,6 +67,8 @@ static const struct mb_cfg baseboard_memcfg = {
 
 	.ect = 1, /* Early Command Training */
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.UserBd = BOARD_TYPE_ULT_ULX,
 };
 
diff --git a/src/mainboard/google/brya/variants/osiris/memory.c b/src/mainboard/google/brya/variants/osiris/memory.c
index 4d1637917464..d18cad30872d 100644
--- a/src/mainboard/google/brya/variants/osiris/memory.c
+++ b/src/mainboard/google/brya/variants/osiris/memory.c
@@ -63,6 +63,8 @@ static const struct mb_cfg osiris_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
@@ -125,6 +127,8 @@ static const struct mb_cfg hynix_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 
 	.cs_pi_start_high_in_ect = 1,
diff --git a/src/mainboard/google/brya/variants/taeko/memory.c b/src/mainboard/google/brya/variants/taeko/memory.c
index cecfdc622221..a35708d4b66a 100644
--- a/src/mainboard/google/brya/variants/taeko/memory.c
+++ b/src/mainboard/google/brya/variants/taeko/memory.c
@@ -66,6 +66,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
@@ -128,6 +130,8 @@ static const struct mb_cfg hynix_memconfig = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 
 	.cs_pi_start_high_in_ect = 1,
diff --git a/src/mainboard/google/brya/variants/taeko4es/memory.c b/src/mainboard/google/brya/variants/taeko4es/memory.c
index e9e85339310e..fdf06b1f58f0 100644
--- a/src/mainboard/google/brya/variants/taeko4es/memory.c
+++ b/src/mainboard/google/brya/variants/taeko4es/memory.c
@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
diff --git a/src/mainboard/google/brya/variants/taniks/memory.c b/src/mainboard/google/brya/variants/taniks/memory.c
index e7cba57c30b5..1d096af3f3b3 100644
--- a/src/mainboard/google/brya/variants/taniks/memory.c
+++ b/src/mainboard/google/brya/variants/taniks/memory.c
@@ -63,6 +63,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = 1, /* Enable Early Command Training */
 };
 
diff --git a/src/mainboard/google/brya/variants/vell/memory.c b/src/mainboard/google/brya/variants/vell/memory.c
index faa6eecde0da..341634e2faa2 100644
--- a/src/mainboard/google/brya/variants/vell/memory.c
+++ b/src/mainboard/google/brya/variants/vell/memory.c
@@ -58,6 +58,8 @@ static const struct mb_cfg baseboard_memcfg = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = true, /* Early Command Training */
 	.UserBd =  BOARD_TYPE_ULT_ULX_T4,