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authorYidi Lin <yidi.lin@mediatek.com>2021-04-01 21:21:09 +0800
committerHung-Te Lin <hungte@chromium.org>2021-05-10 05:28:12 +0000
commit19a1bad42597c939dbd0ce9eabe8d610d3f7e2c2 (patch)
tree2d1655d5c667274acb839c8e4b064ee32164a2b5 /src/mainboard/google/cherry
parent18b51e93ac5a772e60a46d7dd6236e70429a1e91 (diff)
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mb/google/cherry: Enable Chrome EC
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: Iab3549b5c4e7d845ddd284a0df3fb448e11fbdcb Reviewed-on: https://review.coreboot.org/c/coreboot/+/53899 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard/google/cherry')
-rw-r--r--src/mainboard/google/cherry/Kconfig12
-rw-r--r--src/mainboard/google/cherry/bootblock.c2
-rw-r--r--src/mainboard/google/cherry/chromeos.c6
-rw-r--r--src/mainboard/google/cherry/reset.c4
4 files changed, 18 insertions, 6 deletions
diff --git a/src/mainboard/google/cherry/Kconfig b/src/mainboard/google/cherry/Kconfig
index bf46532a956f..b9c63ea9e671 100644
--- a/src/mainboard/google/cherry/Kconfig
+++ b/src/mainboard/google/cherry/Kconfig
@@ -6,14 +6,22 @@ config BOARD_GOOGLE_CHERRY_COMMON
if BOARD_GOOGLE_CHERRY_COMMON
+config VBOOT
+ select EC_GOOGLE_CHROMEEC_SWITCHES
+ select VBOOT_VBNV_FLASH
+
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SOC_MEDIATEK_MT8195
select BOARD_ROMSIZE_KB_8192
select MAINBOARD_HAS_CHROMEOS
+ select CHROMEOS_USE_EC_WATCHDOG_FLAG if CHROMEOS
select COMMON_CBFS_SPI_WRAPPER
select SPI_FLASH
select SPI_FLASH_INCLUDE_ALL_DRIVERS
+ select EC_GOOGLE_CHROMEEC
+ select EC_GOOGLE_CHROMEEC_BOARDID
+ select EC_GOOGLE_CHROMEEC_SPI
config MAINBOARD_DIR
string
@@ -28,4 +36,8 @@ config MAINBOARD_PART_NUMBER
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 7
+
+config EC_GOOGLE_CHROMEEC_SPI_BUS
+ hex
+ default 0x0
endif
diff --git a/src/mainboard/google/cherry/bootblock.c b/src/mainboard/google/cherry/bootblock.c
index adb87d03d9f5..dbc6c26e5e5a 100644
--- a/src/mainboard/google/cherry/bootblock.c
+++ b/src/mainboard/google/cherry/bootblock.c
@@ -3,6 +3,7 @@
#include <bootblock_common.h>
#include <device/mmio.h>
#include <soc/gpio.h>
+#include <soc/spi.h>
#include "gpio.h"
@@ -35,6 +36,7 @@ static void nor_set_gpio_pinmux(void)
void bootblock_mainboard_init(void)
{
+ mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
nor_set_gpio_pinmux();
setup_chromeos_gpios();
}
diff --git a/src/mainboard/google/cherry/chromeos.c b/src/mainboard/google/cherry/chromeos.c
index f606ba39fd22..1a869a3fe079 100644
--- a/src/mainboard/google/cherry/chromeos.c
+++ b/src/mainboard/google/cherry/chromeos.c
@@ -28,9 +28,3 @@ void fill_lb_gpios(struct lb_gpios *gpios)
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
-
-int get_recovery_mode_switch(void)
-{
- /* TODO: use Chrome EC switches when EC support is added */
- return 0;
-}
diff --git a/src/mainboard/google/cherry/reset.c b/src/mainboard/google/cherry/reset.c
index 3a97ee5393ba..91ee7c074de2 100644
--- a/src/mainboard/google/cherry/reset.c
+++ b/src/mainboard/google/cherry/reset.c
@@ -1,7 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <gpio.h>
#include <reset.h>
+#include "gpio.h"
+
void do_board_reset(void)
{
+ gpio_output(GPIO_RESET, 1);
}