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| author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-08-04 11:00:53 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-08-09 01:53:06 +0000 |
| commit | 257eb1354e5fedb01b63ff327f64554a44547c22 (patch) | |
| tree | 71759379ceb0dc3cfbe2c00e63dd35644234583d /src/mainboard/google/cherry | |
| parent | 55c98c368c1df269e0c4c62250848089df612032 (diff) | |
| download | coreboot-257eb1354e5fedb01b63ff327f64554a44547c22.tar.gz coreboot-257eb1354e5fedb01b63ff327f64554a44547c22.tar.bz2 coreboot-257eb1354e5fedb01b63ff327f64554a44547c22.zip | |
mb/google/cherry: Improve boot time by raising little CPU frequency
Raise little CPU to 2GHz at romstage to improve boot time by about
100 ms.
BUG=b:195274787
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Id6aac8f9db86a6c1e61ea94863f2cbde12c0482e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56844
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard/google/cherry')
| -rw-r--r-- | src/mainboard/google/cherry/romstage.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/romstage.c b/src/mainboard/google/cherry/romstage.c index c11fef45dc05..71291c24a3cb 100644 --- a/src/mainboard/google/cherry/romstage.c +++ b/src/mainboard/google/cherry/romstage.c @@ -1,21 +1,33 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/stages.h> +#include <delay.h> #include <soc/clkbuf.h> #include <soc/emi.h> #include <soc/i2c.h> #include <soc/mt6315.h> #include <soc/mt6359p.h> #include <soc/mt6360.h> +#include <soc/pll_common.h> #include <soc/pmif.h> #include <soc/rtc.h> #include <soc/scp.h> +static void raise_little_cpu_freq(void) +{ + mt6359p_buck_set_voltage(MT6359P_SRAM_PROC1, 1000 * 1000); + mt6359p_buck_set_voltage(MT6359P_CORE, 1000 * 1000); + udelay(200); + mt_pll_raise_little_cpu_freq(2000 * MHz); + mt_pll_raise_cci_freq(1385 * MHz); +} + void platform_romstage_main(void) { mtk_pmif_init(); mt6359p_init(); mt6315_init(); + raise_little_cpu_freq(); mtk_i2c_bus_init(I2C7); if (CONFIG(BOARD_GOOGLE_CHERRY)) mt6360_init(I2C7); |