google/cyan: fix variant memory/silicon init params override

The mainboard_memory_init_params() and mainboard_silicon_init_params()
methods already have weak definitions in drivers/intel/fsp1_1,
so having them declared as weak in the cyan baseboard has the effect
of them not being called at all unless overridden at the variant level.

Therefore, remove the weak declarations in the baseboard and ensure
that each variant has its own init functions if needed.

TEST: build/boot google/cyan

Change-Id: I1c76cb5838ef1e65e72c7341d951f9baf2ddd41b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21704
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 12 insertions, 3 deletions

diff --git a/src/mainboard/google/cyan/romstage.c b/src/mainboard/google/cyan/romstage.c
index 57c40e09bdc0..c164ea4792e9 100644
--- a/src/mainboard/google/cyan/romstage.c
+++ b/src/mainboard/google/cyan/romstage.c
@@ -15,6 +15,7 @@
  */
 
 #include <soc/romstage.h>
+#include <baseboard/variants.h>
 #include <chip.h>
 
 /* All FSP specific code goes in this block */
@@ -28,15 +29,23 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 	romstage_common(rp);
 }
 
-__attribute__ ((weak))
 void mainboard_memory_init_params(struct romstage_params *params,
 	MEMORY_INIT_UPD *memory_params)
 {
 	/* Update SPD data */
-	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) {
+	if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN))
+		memory_params->PcdMemoryTypeEnable = MEM_DDR3;
+	else
 		memory_params->PcdMemoryTypeEnable = MEM_LPDDR3;
-	}
 	memory_params->PcdMemorySpdPtr = (u32)params->pei_data->spd_data_ch0;
 	memory_params->PcdMemChannel0Config = params->pei_data->spd_ch0_config;
 	memory_params->PcdMemChannel1Config = params->pei_data->spd_ch1_config;
+
+	/* Variant-specific memory params */
+	variant_memory_init_params(memory_params);
+}
+
+__attribute__ ((weak))
+void variant_memory_init_params(MEMORY_INIT_UPD *memory_params)
+{
 }