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| author | Nico Huber <nico.h@gmx.de> | 2019-05-04 17:06:06 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-07 15:58:05 +0000 |
| commit | 85f0b051ba441dead63a4a14f4f20d49581fea0e (patch) | |
| tree | de0e33d755daf681eee01a1f45c72fc9a61c56f4 /src/mainboard/google/cyan/spd/spd_util.h | |
| parent | ec562161cd2265c924482835fd2ab32c13ba587e (diff) | |
| download | coreboot-85f0b051ba441dead63a4a14f4f20d49581fea0e.tar.gz coreboot-85f0b051ba441dead63a4a14f4f20d49581fea0e.tar.bz2 coreboot-85f0b051ba441dead63a4a14f4f20d49581fea0e.zip | |
mb/google/cyan: Refactor to get rid of `pei_data`
The SoC specific `struct pei_data` was filled with values that were
later only consumed by the mainboard code again. Avoid jumping through
this hoop and fill FSP UPDs directly.
The provided solution locates the SPD data in CBFS again to fill SMBIOS
tables. This is not perfect. OTOH, this code isn't mainboard specific
and doesn't belong here anyway.
Change-Id: Ib6103d5b9550846fe17c926631a013ff80b9598f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32593
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/google/cyan/spd/spd_util.h')
| -rw-r--r-- | src/mainboard/google/cyan/spd/spd_util.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/cyan/spd/spd_util.h b/src/mainboard/google/cyan/spd/spd_util.h index 11d6eaa16d99..0c5b3265ef2a 100644 --- a/src/mainboard/google/cyan/spd/spd_util.h +++ b/src/mainboard/google/cyan/spd/spd_util.h @@ -16,7 +16,10 @@ #ifndef SPD_UTIL_H #define SPD_UTIL_H +#include <fsp/soc_binding.h> + uint8_t get_ramid(void); int get_variant_spd_index(int ram_id, int *dual); +void spd_memory_init_params(MEMORY_INIT_UPD *memory_params); #endif /* SPD_UTIL_H */ |