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| author | Aseda Aboagye <aaboagye@google.com> | 2021-06-15 23:24:26 -0700 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-06-19 00:08:20 +0000 |
| commit | bd503978d4fd57fe38cae3588748ee52b1bfdcae (patch) | |
| tree | c3f942e3d29b25bc7572c10311514bb7d49fb5ac /src/mainboard/google/dedede/Kconfig | |
| parent | 633560568d5cc24da52f1089f0ae4ca362f7de2f (diff) | |
| download | coreboot-bd503978d4fd57fe38cae3588748ee52b1bfdcae.tar.gz coreboot-bd503978d4fd57fe38cae3588748ee52b1bfdcae.tar.bz2 coreboot-bd503978d4fd57fe38cae3588748ee52b1bfdcae.zip | |
mb/google/dedede: Configure CBI EEPROM WP
On dedede boards without Cr50, the CrOS Board Info (CBI) EEPROM write
protect signal is decoupled from the hardware write protect signal.
Instead, we'd like for it to mirror the software write protect status.
This commit simply checks the software write protect status of the SPI
flash and sets the CBI EEPROM write protect if it's enabled. To prevent
changing the WP signal at run-time, the GPIO configuration is also
locked down after the level has been set. If HW WP is deasserted, the
CBI EEPROM WP will be deasserted as well.
BUG=b:191189275,b:184592299
BRANCH=None
TEST=Build and flash lalala, disable SW WP by running `flashrom -p host
--wp-disable` from a root shell and verify that the GPIO is asserted
after a reboot. Export the gpio via sysfs and verify that attempting to
change the value of the GPIO is futile. Enable SW WP via `flashrom -p
host --wp-enable` and reboot the DUT. Again, export the GPIO via sysfs
and verify that attempts to change the GPIO value are futile.
localhost ~ # iotools mem_read32 0xfd6e08d0
0x44000200
localhost ~ # cd /sys/class/gpio/
localhost /sys/class/gpio # echo 217 > export
localhost /sys/class/gpio # cd gpio217/
localhost /sys/class/gpio/gpio217 # echo out > direction
localhost /sys/class/gpio/gpio217 # cat value
0
localhost /sys/class/gpio/gpio217 # echo 1 > value
localhost /sys/class/gpio/gpio217 # cat value
1
localhost /sys/class/gpio/gpio217 # iotools mem_read32 0xfd6e08d0
0x44000200
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ic103037921ec7d2f96f86178675c11a3a1357d1b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/Kconfig')
| -rw-r--r-- | src/mainboard/google/dedede/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index d8961a37df45..758143a37069 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -29,6 +29,7 @@ config BOARD_GOOGLE_BASEBOARD_DEDEDE select DRIVERS_INTEL_MIPI_CAMERA select SOC_INTEL_COMMON_BLOCK_IPU select DRIVERS_GENERIC_ALC1015 + select SPI_FLASH_SMM config BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 def_bool n |