summaryrefslogtreecommitdiffstats
path: root/src/mainboard/google/dedede/mainboard.c
diff options
context:
space:
mode:
authorTim Wawrzynczak <twawrzynczak@chromium.org>2022-02-14 16:04:21 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-03-07 18:06:24 +0000
commit6b8599f29a888c0946ff44e97c32ecd4cec2a151 (patch)
treeca38ae8682e63f5abc66e9475798b5614a05c0fe /src/mainboard/google/dedede/mainboard.c
parentf019d986b154cb95db541be9c71eafde51ec9294 (diff)
downloadcoreboot-6b8599f29a888c0946ff44e97c32ecd4cec2a151.tar.gz
coreboot-6b8599f29a888c0946ff44e97c32ecd4cec2a151.tar.bz2
coreboot-6b8599f29a888c0946ff44e97c32ecd4cec2a151.zip
drivers/tpm/spi: Refactor out some cr50-specific logic
Mainboards accessing the cr50 over an I2C bus may want to reuse some of the same firmware version and BOARD_CFG logic, therefore refactor this logic out into a bus-agnostic file, drivers/tpm/cr50.c. This file uses the new tis_vendor_read/write() functions in order to access the cr50 regardless of the bus which is physically used. In order to leave SPI devices intact, the tis_vendor_* functions are added to the SPI driver. BUG=b:202246591 TEST=boot to OS on google/dratini, see the same FW version and board_cfg console prints as before the change. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ie68618cbe026a2b9221f93d0fe41d0b2054e8091 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61977 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/mainboard.c')
-rw-r--r--src/mainboard/google/dedede/mainboard.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/mainboard.c b/src/mainboard/google/dedede/mainboard.c
index 700b3e368afa..ca5a21c83bee 100644
--- a/src/mainboard/google/dedede/mainboard.c
+++ b/src/mainboard/google/dedede/mainboard.c
@@ -4,7 +4,7 @@
#include <baseboard/variants.h>
#include <console/console.h>
#include <device/device.h>
-#include <drivers/spi/tpm/tpm.h>
+#include <drivers/tpm/cr50.h>
#include <ec/ec.h>
#include <security/tpm/tss.h>
#include <soc/soc_chip.h>