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| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2020-07-08 17:17:35 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:27:44 +0000 |
| commit | 28bb308a7ae7e6f9052565586b85012b5b153c4c (patch) | |
| tree | 5176a9dafbbd0c97e63efc6ddd9d191deec26f12 /src/mainboard/google/dedede/variants/baseboard/gpio.c | |
| parent | 0358f7dadaac6c3c71c5d8a43c737d3b0a59134a (diff) | |
| download | coreboot-28bb308a7ae7e6f9052565586b85012b5b153c4c.tar.gz coreboot-28bb308a7ae7e6f9052565586b85012b5b153c4c.tar.bz2 coreboot-28bb308a7ae7e6f9052565586b85012b5b153c4c.zip | |
mb/google/dedede: Change HDMI DDC GPIOs to native function
HDMI DDC GPIOs were configured as NC till now in waddledoo.
This may cause HDMI i2c transfer to break and EDID read will
fail due to wrong configuration
Configuring these GPIOs as NF in coreboot to fix the issue.
BUG=b:160324327
BRANCH=None
TEST=HDMI works on DDI2 onn Type-C port
Change-Id: If02f062132d7c3b01b07ea9401e81f451df35c3c
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43294
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/baseboard/gpio.c')
| -rw-r--r-- | src/mainboard/google/dedede/variants/baseboard/gpio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index 1284bc5e34e3..9b60da11c70a 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -224,9 +224,9 @@ static const struct pad_config gpio_table[] = { /* E16 : GPP_E16/DDI1_DDC_SDA */ PAD_NC(GPP_E16, NONE), /* E17 : HDMI_DDC_SCL */ - PAD_NC(GPP_E17, NONE), + PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* E18 : HDMI_DDC_SDA */ - PAD_NC(GPP_E18, NONE), + PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), /* E19 : GPP_E19/IMGCLKOUT_5/PCIE_LNK_DOWN */ PAD_NC(GPP_E19, NONE), /* E20 : CNV_BRI_DT_R */ |