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| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-02-06 17:58:07 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-17 15:35:53 +0000 |
| commit | 2a3cef29d81ab9200b8226be41a09f975c9ed485 (patch) | |
| tree | e7f1dbd350864861a33c39264b56f7c139c8e899 /src/mainboard/google/dedede/variants/baseboard/gpio.c | |
| parent | 47607bdc83558f63b917b4de2e35741fe5366469 (diff) | |
| download | coreboot-2a3cef29d81ab9200b8226be41a09f975c9ed485.tar.gz coreboot-2a3cef29d81ab9200b8226be41a09f975c9ed485.tar.bz2 coreboot-2a3cef29d81ab9200b8226be41a09f975c9ed485.zip | |
mb/google/dedede: Enable AP <-> H1 Communication
Turn on the H1 device in the devicetree. Configure the concerned GPIOs
and enable the required config items.
BUG=None
TEST=Build the mainboard.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I37972635454cd0d35608623e7be4110012ace658
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38772
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/dedede/variants/baseboard/gpio.c')
| -rw-r--r-- | src/mainboard/google/dedede/variants/baseboard/gpio.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index 090841260f16..b9d77bf5853b 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -21,11 +21,31 @@ static const struct pad_config gpio_table[] = { /* A4 : ESPI_CS# */ /* A5 : ESPI_CLK */ /* A6 : ESPI_RESET_L */ + + /* B4 : H1_PCH_INT_ODL */ + PAD_CFG_GPI_APIC(GPP_B4, NONE, PLTRST, LEVEL, INVERT), + /* B15 : H1_SLAVE_SPI_CS_L */ + PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), + /* B16 : H1_SLAVE_SPI_CLK */ + PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1), + /* B17 : H1_SLAVE_SPI_MISO_R */ + PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), + /* B18 : H1_SLAVE_SPI_MOSI_R */ + PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1), }; /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { - /* ToDo: Fill early gpio configuration */ + /* B4 : H1_PCH_INT_ODL */ + PAD_CFG_GPI_APIC(GPP_B4, NONE, PLTRST, LEVEL, INVERT), + /* B15 : H1_SLAVE_SPI_CS_L */ + PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), + /* B16 : H1_SLAVE_SPI_CLK */ + PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1), + /* B17 : H1_SLAVE_SPI_MISO_R */ + PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), + /* B18 : H1_SLAVE_SPI_MOSI_R */ + PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1), }; const struct pad_config *__weak variant_gpio_table(size_t *num) |