mb/google/dedede: Support variant specific power limits

With newer dedede design, it's required to config corresponding
psyspmax, psyspl1, psyspl2, pl1 and pl2 by different kinds of
adapter.

BUG=b:281479111
TEST=emerge-dedede coreboot and check correct value on dibbi

Signed-off-by: Chia-Ling Hou <chia-ling.hou@intel.com>
Change-Id: I583c930379233322c41027805369f81d02000ee7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75680
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>

1 files changed, 24 insertions, 0 deletions

diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h
index edb2b07e3abf..b258481fbb4f 100644
--- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h
@@ -48,6 +48,30 @@ void variant_smi_sleep(u8 slp_typ);
 /* Modify devictree settings during ramstage. */
 void variant_devtree_update(void);
 
+struct psys_config {
+	/*
+	 * The efficiency of type-c chargers
+	 * For example, 'efficiency = 97' means setting 97% of max power to account for
+	 * cable loss and FET Rdson loss in the path from the source.
+	 */
+	unsigned int efficiency;
+
+	/* The maximum current maps to the Psys signal */
+	unsigned int psys_imax_ma;
+
+	/* The voltage of barrel jack */
+	unsigned int bj_volts_mv;
+
+	/* The barrel jack power */
+	unsigned int bj_power_w;
+};
+
+/*
+ * Modify Power Limit and PsysPL devictree settings during ramstage.
+ * Note, this function must be called in front of calling variant_update_power_limits.
+ */
+void variant_update_psys_power_limits(const struct psys_config *config);
+
 /* Modify LTE devictree settings during ramstage. */
 void update_lte_device(struct acpi_gpio *lte_reset_gpio, struct acpi_gpio *lte_enable_gpio);