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authorTeddy Shih <teddyshih@ami.corp-partner.google.com>2022-06-24 12:36:06 +0800
committerKarthik Ramasubramanian <kramasub@google.com>2022-08-03 13:59:42 +0000
commitef29befb09278eb4ed74d97a3808d21d0a691fbb (patch)
treedfb30c531fefd3bc6aef53ee26e1b73427fa9878 /src/mainboard/google/dedede/variants/beadrix/overridetree.cb
parentec1afc58afeedd194dbddddbef4c11e0d1667f03 (diff)
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mb/google/dedede/var/beadrix: Update SoC gpio pin of BC1.2
Update SoC GPIO setting of adding BC1.2 SLGC55545 according to beadrix schematics. GPP_A18 : NC -> NF1 (USB_OC0_N) BUG=b:214393595, b:226294980 BRANCH=None TEST=on beadrix, validated by beadrix's Type A working properly. Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com> Change-Id: I746931582cc12f49f7f1c667563350ebac8ddfa1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com> Reviewed-by: Ivan Chen <yulunchen@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/beadrix/overridetree.cb')
-rw-r--r--src/mainboard/google/dedede/variants/beadrix/overridetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb
index 82677a295627..46a74ce09bc0 100644
--- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb
@@ -9,6 +9,7 @@ end
chip soc/intel/jasperlake
# USB Port Configuration
+ register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # USB3 Type A port
register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable unused USB2P_5 and USB2N_5
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable unused USB2P_7 and USB2N_7