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| author | Marco Chen <marcochen@chromium.org> | 2020-04-30 14:40:18 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-18 07:14:43 +0000 |
| commit | e88f0311beec6d0df671819d892d4635e1aed2c8 (patch) | |
| tree | ee8ecb552e2822fbda736d30f7dc4aef21a6144c /src/mainboard/google/dedede/variants/waddledee/Makefile.inc | |
| parent | 97c5464443306f26b61cec3a0f50108a5c06b7ef (diff) | |
| download | coreboot-e88f0311beec6d0df671819d892d4635e1aed2c8.tar.gz coreboot-e88f0311beec6d0df671819d892d4635e1aed2c8.tar.bz2 coreboot-e88f0311beec6d0df671819d892d4635e1aed2c8.zip | |
mb/google/dedede: update SPD name based on DRAM characteristic
The index of DRAM_STRAPS indicates to a specific DRAM characteristic
instead of a DRAM part number therefore update the existing DRAM SPD
binary to the naming by DRAM characteristic.
BUG=b:152019429
BRANCH=None
TEST=build the image and verify that coreboot log shows the correct SPD
info
Change-Id: I8ffcf156f37a465209740c5e2a34effb5f1f5d5c
Signed-off-by: Marco Chen <marcochen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/waddledee/Makefile.inc')
| -rw-r--r-- | src/mainboard/google/dedede/variants/waddledee/Makefile.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc index 6101f1583d5c..dfb97bae959f 100644 --- a/src/mainboard/google/dedede/variants/waddledee/Makefile.inc +++ b/src/mainboard/google/dedede/variants/waddledee/Makefile.inc @@ -1,6 +1,6 @@ ## SPDX-License-Identifier: GPL-2.0-or-later -SPD_SOURCES = Micron_MT53E512M32D2NP_2GB #0b0000 -SPD_SOURCES += empty #0b0001 +SPD_SOURCES = SPD_LPDDR4X_200b_8Gb_4267_DDP_1x16 #0b0000 +SPD_SOURCES += empty #0b0001 romstage-y += memory.c |