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| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-03-01 12:33:50 -0700 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-03-03 05:27:57 +0000 |
| commit | e8e5107b49950084ed21603223d1a42eb9131313 (patch) | |
| tree | 7ba0b6191d4004019e057ffcc1b109314fb0e581 /src/mainboard/google/dedede | |
| parent | 7221830894bf49c049c9a99eaa51b88caa80500c (diff) | |
| download | coreboot-e8e5107b49950084ed21603223d1a42eb9131313.tar.gz coreboot-e8e5107b49950084ed21603223d1a42eb9131313.tar.bz2 coreboot-e8e5107b49950084ed21603223d1a42eb9131313.zip | |
mb/google/dedede/var/drawcia: Re-tune override GPIO table
There is going to be an upcoming board version for Drawlat/man and
Drawcia. Hence apply the override GPIO table without pad termination for
board versions 6 or 8 alone.
BUG=None
BRANCH=dedede
TEST=Build and boot to OS in Drawcia.
Change-Id: I320de9a0c37ac033f3efda74eeb8f36e34667fd4
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51153
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Diffstat (limited to 'src/mainboard/google/dedede')
| -rw-r--r-- | src/mainboard/google/dedede/variants/drawcia/gpio.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/gpio.c b/src/mainboard/google/dedede/variants/drawcia/gpio.c index 863d289a70ca..96b64cc4fe9a 100644 --- a/src/mainboard/google/dedede/variants/drawcia/gpio.c +++ b/src/mainboard/google/dedede/variants/drawcia/gpio.c @@ -2,18 +2,19 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> +#include <boardid.h> #include <fw_config.h> #include <ec/google/chromeec/ec.h> /* Pad configuration in ramstage*/ -static const struct pad_config pre_board6_gpio_table[] = { +static const struct pad_config not_board6or8_gpio_table[] = { /* C12 : AP_PEN_DET_ODL */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, UP_20K, DEEP), }; -/* bid6: Pad configuration for board version 6 afterward in ramstage*/ -static const struct pad_config board6_gpio_table[] = { +/* bid6: Pad configuration for board version 6 or 8 in ramstage*/ +static const struct pad_config board6or8_gpio_table[] = { /* C12 : AP_PEN_DET_ODL has an external pull-up and hence no pad termination.*/ PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP), @@ -21,15 +22,13 @@ static const struct pad_config board6_gpio_table[] = { const struct pad_config *variant_override_gpio_table(size_t *num) { - uint32_t board_version; - *num = ARRAY_SIZE(pre_board6_gpio_table); - - if (!google_chromeec_cbi_get_board_version(&board_version)) { - if (board_version >= 6) { - *num = ARRAY_SIZE(board6_gpio_table); - return board6_gpio_table; - } + uint32_t board_version = board_id(); + *num = ARRAY_SIZE(not_board6or8_gpio_table); + + if (board_version == 6 || board_version >= 8) { + *num = ARRAY_SIZE(board6or8_gpio_table); + return board6or8_gpio_table; } - return pre_board6_gpio_table; + return not_board6or8_gpio_table; } |