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author | Subrata Banik <subratabanik@google.com> | 2022-03-10 17:53:14 +0530 |
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committer | Subrata Banik <subratabanik@google.com> | 2022-03-15 10:17:25 +0000 |
commit | 2eb51aace5489b2f2d20e510f19a1e3b17bf1d60 (patch) | |
tree | 9bf2dcdc8ca37ca5aa4c49a24c0c5e764928d7f1 /src/mainboard/google/deltaur | |
parent | 5730d018d1395cf68c2fe0e795831f6780c734de (diff) | |
download | coreboot-2eb51aace5489b2f2d20e510f19a1e3b17bf1d60.tar.gz coreboot-2eb51aace5489b2f2d20e510f19a1e3b17bf1d60.tar.bz2 coreboot-2eb51aace5489b2f2d20e510f19a1e3b17bf1d60.zip |
{mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype
This patch modifies `memcfg_init` and `variant_memory_init`functions
argument from FSP_M_CONFIG to FSPM_UPD.
This change in `memcfg_init()` argument will help to update the
architectural FSP-M UPDs from common code blocks rather than going
into SoC and/or mainboard implementation.
BUG=b:200243989
BRANCH=firmware-brya-14505.B
TEST=Able to build and boot redrix without any visible failure/errors.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3002dd5c2f3703de41f38512976296f63e54d0c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Diffstat (limited to 'src/mainboard/google/deltaur')
4 files changed, 6 insertions, 7 deletions
diff --git a/src/mainboard/google/deltaur/romstage.c b/src/mainboard/google/deltaur/romstage.c index c04f6fb1a935..f9d71a8388ca 100644 --- a/src/mainboard/google/deltaur/romstage.c +++ b/src/mainboard/google/deltaur/romstage.c @@ -5,6 +5,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { - FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; - variant_memory_init(mem_cfg); + variant_memory_init(mupd); } diff --git a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h index 7a4ed08f5902..6804ef6b19d7 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h @@ -19,7 +19,7 @@ const struct pad_config *variant_override_gpio_table(size_t *num); const struct cros_gpio *variant_cros_gpios(size_t *num); const struct mb_cfg *variant_memory_params(void); -void variant_memory_init(FSP_M_CONFIG *mem_cfg); +void variant_memory_init(FSPM_UPD *mupd); /* SKU ID structure */ typedef struct { diff --git a/src/mainboard/google/deltaur/variants/deltan/memory.c b/src/mainboard/google/deltaur/variants/deltan/memory.c index caa99a9b0109..37c21cc04522 100644 --- a/src/mainboard/google/deltaur/variants/deltan/memory.c +++ b/src/mainboard/google/deltaur/variants/deltan/memory.c @@ -61,7 +61,7 @@ static const struct mb_cfg baseboard_memcfg = { .ect = false, /* Disable Early Command Training */ }; -void variant_memory_init(FSP_M_CONFIG *mem_cfg) +void variant_memory_init(FSPM_UPD *mupd) { const struct mem_spd spd_info = { .topo = MEM_TOPO_DIMM_MODULE, @@ -77,5 +77,5 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg) new_board_cfg_ddr4.ddr4_config.dq_pins_interleaved = gpio_get(MEMORY_INTERLEAVED); - memcfg_init(mem_cfg, &new_board_cfg_ddr4, &spd_info, half_populated); + memcfg_init(mupd, &new_board_cfg_ddr4, &spd_info, half_populated); } diff --git a/src/mainboard/google/deltaur/variants/deltaur/memory.c b/src/mainboard/google/deltaur/variants/deltaur/memory.c index f8506df54b3b..a2037a84cf35 100644 --- a/src/mainboard/google/deltaur/variants/deltaur/memory.c +++ b/src/mainboard/google/deltaur/variants/deltaur/memory.c @@ -77,7 +77,7 @@ static int variant_memory_sku(void) return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); } -void variant_memory_init(FSP_M_CONFIG *mem_cfg) +void variant_memory_init(FSPM_UPD *mupd) { const struct mb_cfg *board_cfg = variant_memory_params(); const struct mem_spd spd_info = { @@ -85,5 +85,5 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg) .cbfs_index = variant_memory_sku(), }; const bool half_populated = false; - memcfg_init(mem_cfg, board_cfg, &spd_info, half_populated); + memcfg_init(mupd, board_cfg, &spd_info, half_populated); } |