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| author | Jamie Chen <jamie.chen@intel.com> | 2020-02-12 15:49:58 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-17 15:39:46 +0000 |
| commit | 4e3cb9588bf15b416698484faad8454482ceae41 (patch) | |
| tree | 271589ed138edea0a54fe0842b4718fe9d80bce1 /src/mainboard/google/drallion | |
| parent | b4a2938f0936985bca4b3715eddb1392ef422297 (diff) | |
| download | coreboot-4e3cb9588bf15b416698484faad8454482ceae41.tar.gz coreboot-4e3cb9588bf15b416698484faad8454482ceae41.tar.bz2 coreboot-4e3cb9588bf15b416698484faad8454482ceae41.zip | |
mb/google/puff: Enable SPD_READ_BY_WORD to short the boottime
Puff uses the smbus to access the SPD of memory DIMMs.
It will short the SPD reading time if enabling SPD_READ_BY_WORD.
BUG=b:149360051
BRANCH=None
TEST=build puff and boot up OS
ran cbmem -t | grep FspMemoryInit
Without this patch:
950:calling FspMemoryInit 643,199 (257,588)
With this patch:
950:calling FspMemoryInit 477,714 (154,612)
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Change-Id: I161e8eb386ab604b16746f0deeecc3d6c9063c3a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/mainboard/google/drallion')
0 files changed, 0 insertions, 0 deletions