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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-02 18:28:22 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-13 17:32:37 +0000 |
| commit | a1843d8411d3caebd0600421c2b6a4c6b0588c19 (patch) | |
| tree | d1baeb97ea1ca28ca09df0ceb3edd53ef0eea029 /src/mainboard/google/eve | |
| parent | 8a64ad09a100adf478d65e42e4cc10a18ccc2d16 (diff) | |
| download | coreboot-a1843d8411d3caebd0600421c2b6a4c6b0588c19.tar.gz coreboot-a1843d8411d3caebd0600421c2b6a4c6b0588c19.tar.bz2 coreboot-a1843d8411d3caebd0600421c2b6a4c6b0588c19.zip | |
soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig
Select `PM_ACPI_TIMER_OPTIONAL` to enable the new PM ACPI Kconfig and
set the FSP option for PM ACPI timer enablement from its value instead
of using the old devicetree option.
Also drop the obsolete devicetree option from soc code and from the
mainboards and add a corresponding Kconfig entry instead.
Change-Id: I10724ccf1647594404cec15c2349ab05b6c9714f
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45955
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/eve')
| -rw-r--r-- | src/mainboard/google/eve/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/google/eve/devicetree.cb | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/eve/Kconfig b/src/mainboard/google/eve/Kconfig index f7e82959ce97..9316c7f213ae 100644 --- a/src/mainboard/google/eve/Kconfig +++ b/src/mainboard/google/eve/Kconfig @@ -76,4 +76,7 @@ config INCLUDE_NHLT_BLOBS config UART_FOR_CONSOLE int default 2 + +config USE_PM_ACPI_TIMER + default n endif diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 519e53ba6c20..6c1144b736e6 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s - register "PmTimerDisabled" = "1" # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ |