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| author | Edward O'Callaghan <quasisec@google.com> | 2020-03-23 13:06:42 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-03-26 05:32:40 +0000 |
| commit | 0e1380683fae3fd042ff30274add110a45720aa1 (patch) | |
| tree | 7821a230d23c5e4abbd460e826f667f52a74878d /src/mainboard/google/fizz/variants/baseboard/devicetree.cb | |
| parent | d08bc5ad7a83f56e0114b1d01bcab853d0da5cfb (diff) | |
| download | coreboot-0e1380683fae3fd042ff30274add110a45720aa1.tar.gz coreboot-0e1380683fae3fd042ff30274add110a45720aa1.tar.bz2 coreboot-0e1380683fae3fd042ff30274add110a45720aa1.zip | |
drivers/net/r8168: Fix ethernet_mac[0-9] format for vpd
The format for VPD has changed s.t. the first NIC should
always have a zero concat to the end.
Adjust all the respective boards to shift back by one and
adjust drivers/net friends to remove the 'special casing'
of idx == 0.
Background:
https://chromeos.google.com/partner/dlm/docs/factory/vpd.html#field-ethernet_macn
V.2: Fixup a code comment typo while we are here.
V.3: Vary special casing semantics for idx==0 => default mac addr is set.
V.4: Rework to still support the legacy path.
BUG=b:152157720
BRANCH=none
TEST=none
Change-Id: Idf83cc621a9333186dabb668b22c4b78e211930a
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/fizz/variants/baseboard/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/fizz/variants/baseboard/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index c1afe3d4391c..5da9997d5993 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -411,8 +411,8 @@ chip soc/intel/skylake chip drivers/net register "customized_leds" = "0x0fa5" register "wake" = "GPE0_PCI_EXP" - register "device_index" = "1" device pci 00.0 on end + register "device_index" = "0" end end # PCI Express Port 3 device pci 1c.3 on @@ -428,7 +428,7 @@ chip soc/intel/skylake device pci 1d.0 on # PCI Express Port 9 for 2nd LAN chip drivers/net register "customized_leds" = "0x0fa5" - register "device_index" = "2" + register "device_index" = "1" device pci 00.0 on end end end # PCI Express Port 9 for BtoB |