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| author | Matt DeVillier <matt.devillier@gmail.com> | 2019-01-05 02:16:39 -0600 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-01-06 13:30:57 +0000 |
| commit | 89393d633d70b9393af5b1c74af95c5e24bd99b0 (patch) | |
| tree | 8bc2952f16f03ca2901b8715dfad82b2e98dca41 /src/mainboard/google/fizz/variants/baseboard/devicetree.cb | |
| parent | 796bd74d632f9086029921280afd9ecb75c863af (diff) | |
| download | coreboot-89393d633d70b9393af5b1c74af95c5e24bd99b0.tar.gz coreboot-89393d633d70b9393af5b1c74af95c5e24bd99b0.tar.bz2 coreboot-89393d633d70b9393af5b1c74af95c5e24bd99b0.zip | |
mb/google/fizz: enable eist (enhanced speedstep)
Without eist enabled, fizz's CPU clocks are locked at the
base frequency, and don't scale up or down. This prevents
fizz from idling properly and turbo boost from functioning,
so enable it (as is done for all other KBL boards)
Test: build/boot google/fizz, ensure CPU clocks scale as expected
Change-Id: I77dd0e1df1bf88f5bae18e9f832ca8d60fb777b4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30674
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/google/fizz/variants/baseboard/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/fizz/variants/baseboard/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index cc48498dd1ed..c7c35c04d273 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -7,6 +7,8 @@ chip soc/intel/skylake register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" + register "eist_enable" = "1" + # Mapping of USB port # to device #+----------------+-------+-----------------------------------+ #| Device | Port# | Rev | |