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| author | Furquan Shaikh <furquan@google.com> | 2019-10-23 11:15:57 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-25 06:55:37 +0000 |
| commit | ca1187faa2a8a0deb7040c05e358442880c027be (patch) | |
| tree | 60c4907ae8b1553a0500cfd54754b4e13507b3a2 /src/mainboard/google/glados/Makefile.inc | |
| parent | 514ddef4e51c3f9ec1747764e438b570e6725864 (diff) | |
| download | coreboot-ca1187faa2a8a0deb7040c05e358442880c027be.tar.gz coreboot-ca1187faa2a8a0deb7040c05e358442880c027be.tar.bz2 coreboot-ca1187faa2a8a0deb7040c05e358442880c027be.zip | |
mb/google/{glados,dragonegg}: Configure GPIOs in mainboard chip->init()
mainboard_silicon_init_params() is supposed to be used for only
overriding any FSP params as per mainboard configuration. GPIOs should
be configured by mainboard as part of its chip init(). This ensures
proper ordering w.r.t. any common operations that the SoC code might
want to perform e.g. snapshot ITSS polarities.
This change moves the configuration of GPIOs from
mainboard_silicon_init_params() to mainboard chip->init().
Change-Id: I5d10c01c5b9d5f8ed02274d51dcf9c2a17269685
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36270
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/glados/Makefile.inc')
| -rw-r--r-- | src/mainboard/google/glados/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/glados/Makefile.inc b/src/mainboard/google/glados/Makefile.inc index da9de295213d..323e68baa28d 100644 --- a/src/mainboard/google/glados/Makefile.inc +++ b/src/mainboard/google/glados/Makefile.inc @@ -27,7 +27,6 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c ramstage-y += mainboard.c -ramstage-y += ramstage.c smm-y += smihandler.c |