diff options
| author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2021-03-15 06:42:15 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-03-22 03:49:18 +0000 |
| commit | 699a709bdcee250136a8b5f7af13a6d534598f1d (patch) | |
| tree | 36da2440fb6b595239fd440d510a8c9aa6802d00 /src/mainboard/google/guybrush/variants/baseboard/devicetree.cb | |
| parent | 7b13e4ef2a874aa28ec479824f5ef0e125b338bc (diff) | |
| download | coreboot-699a709bdcee250136a8b5f7af13a6d534598f1d.tar.gz coreboot-699a709bdcee250136a8b5f7af13a6d534598f1d.tar.bz2 coreboot-699a709bdcee250136a8b5f7af13a6d534598f1d.zip | |
mb/google/guybrush: Add initial I2C configuration
Add I2C peripheral reset configuration required during early init.
Enabled I2C generic and HID drivers. I2C GPIOs are configured as
required in CB:50091.
BUG=b:180531661
TEST=Build guybrush mainboard.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I67690fbd25639879a730260aaca4cddb5e47bbc7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/guybrush/variants/baseboard/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/guybrush/variants/baseboard/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb index fa15509f4429..3205d21680c3 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb @@ -38,6 +38,9 @@ chip soc/amd/cezanne .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12), }" + register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | + GPIO_I2C2_SCL | GPIO_I2C3_SCL" + device domain 0 on device ref gpp_bridge_0 on end # WLAN device ref gpp_bridge_1 on end # SD |