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| author | Felix Singer <felixsinger@posteo.net> | 2021-04-19 16:51:22 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-04-22 10:23:30 +0000 |
| commit | efa5a463505f09d88e39f8fe847f1da4abb8ac10 (patch) | |
| tree | edfe1308e792fc83dfafedd02a0a4493f92b4445 /src/mainboard/google/hatch/Kconfig | |
| parent | 091532d8ee34116e0a8c5a7775f971ada895c4c9 (diff) | |
| download | coreboot-efa5a463505f09d88e39f8fe847f1da4abb8ac10.tar.gz coreboot-efa5a463505f09d88e39f8fe847f1da4abb8ac10.tar.bz2 coreboot-efa5a463505f09d88e39f8fe847f1da4abb8ac10.zip | |
soc/intel/cannonlake: Set DIMM_SPD_SIZE to 512
All related mainboards are setting DIMM_SPD_SIZE to 512. Therefore,
default to 512 in the SoC Kconfig and drop it from related mainboard
Kconfigs.
Change-Id: Idb6a0e42961eeb490afd76b4aa7d940961991733
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52513
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/Kconfig')
| -rw-r--r-- | src/mainboard/google/hatch/Kconfig | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 13e4248f3b9b..c4ca4f9bc34c 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -70,10 +70,6 @@ config DIMM_MAX int default 2 -config DIMM_SPD_SIZE - int - default 512 - config ROMSTAGE_SPD_CBFS bool default y if !ROMSTAGE_SPD_SMBUS |