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| author | Ravi Kumar Bokka <rbokka@codeaurora.org> | 2021-09-15 16:04:00 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2021-09-21 19:36:54 +0000 |
| commit | f33d2e4b1dee0164ad25ed7c194d623a3559959e (patch) | |
| tree | 5d41917c4a4b907a4215854e187a7ca215a67dec /src/mainboard/google/herobrine | |
| parent | 9a2ccc4e716343f7d1558dfdc90425229e8e8884 (diff) | |
| download | coreboot-f33d2e4b1dee0164ad25ed7c194d623a3559959e.tar.gz coreboot-f33d2e4b1dee0164ad25ed7c194d623a3559959e.tar.bz2 coreboot-f33d2e4b1dee0164ad25ed7c194d623a3559959e.zip | |
src/mainboard/herobrine: Load GSI FW in ramstage
Load GSI FW in ramstage and make it part of RW
BUG=b:182963902
TEST=Validated on qualcomm sc7280 development board.
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Change-Id: I3d9caa0921fcf9ad67f1071cdf769a99fb6d1a30
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55964
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/mainboard/google/herobrine')
| -rw-r--r-- | src/mainboard/google/herobrine/mainboard.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c index 55b1c5e5751f..98e6f5c3a0b2 100644 --- a/src/mainboard/google/herobrine/mainboard.c +++ b/src/mainboard/google/herobrine/mainboard.c @@ -29,6 +29,9 @@ static void mainboard_init(struct device *dev) clock_configure_sdcc(2, 50 * MHz); configure_sdhci(); + gpi_firmware_load(QUP_0_GSI_BASE); + gpi_firmware_load(QUP_1_GSI_BASE); + /* * When coreboot firmware disables serial output, * we still need to load console UART QUP FW for OS. |