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| author | Shelley Chen <shchen@google.com> | 2022-04-01 14:58:22 -0700 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-04-02 07:24:01 +0000 |
| commit | faaa7597631f35a3299846f77a6d20076c16bde9 (patch) | |
| tree | 6f36b8e2b497a2bfdaf6b9abde38815517544a5f /src/mainboard/google/herobrine | |
| parent | 0b7aa5abcb7227ac44b3a5e0b3997c5a015f95b9 (diff) | |
| download | coreboot-faaa7597631f35a3299846f77a6d20076c16bde9.tar.gz coreboot-faaa7597631f35a3299846f77a6d20076c16bde9.tar.bz2 coreboot-faaa7597631f35a3299846f77a6d20076c16bde9.zip | |
herobrine: fix emmc and sd card clocks
Found an issue where emmc and sd clocks were being misconfigured due
to using incorrect integer values when called instead of the defined
enums. Fixing by splitting the clock_configure_sdcc() function into
two (sdcc1 and sdcc2) as there was no commonality between the two
cases anyway. As a result, we can also get rid of the clk_sdcc enum.
BUG=b:198627043
BRANCH=None
TEST=build herobrine image and test in conjunction with CB:63289
make sure assert is not thrown.
Change-Id: I68f9167499ede057922135623a4b04202f4da9b5
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63311
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/herobrine')
| -rw-r--r-- | src/mainboard/google/herobrine/mainboard.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c index 7bdede019876..c8af6865e796 100644 --- a/src/mainboard/google/herobrine/mainboard.c +++ b/src/mainboard/google/herobrine/mainboard.c @@ -50,9 +50,9 @@ static void qi2s_configure_gpios(void) static void mainboard_init(struct device *dev) { /* Configure clock for eMMC */ - clock_configure_sdcc(1, 384 * MHz); + clock_configure_sdcc1(384 * MHz); /* Configure clock for SD card */ - clock_configure_sdcc(2, 50 * MHz); + clock_configure_sdcc2(50 * MHz); configure_sdhci(); gpi_firmware_load(QUP_0_GSI_BASE); |