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| author | Shaoming Chen <shaoming.chen@mediatek.corp-partner.google.com> | 2021-01-05 10:47:27 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-15 11:29:34 +0000 |
| commit | 769320d1c492b60119f7e7e779971836ed98a63d (patch) | |
| tree | 6e46910b477c3fae23136fa19f10ef0f652f7761 /src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c | |
| parent | 5ff588dbc10bbf69f140cebf3a584f1ed563b1c5 (diff) | |
| download | coreboot-769320d1c492b60119f7e7e779971836ed98a63d.tar.gz coreboot-769320d1c492b60119f7e7e779971836ed98a63d.tar.bz2 coreboot-769320d1c492b60119f7e7e779971836ed98a63d.zip | |
mb/google/kukui: Add new ddr architecture support for kukui
Two configuration files are added:
1. H9HCNNNFAMMLXR-NEE-8GB: new byte mode
2. MT53E1G32D2NP-046-4GB: new single rank mode
Also initialize the rank number field 'rank_num' for all configs.
BUG=b:165768895
BRANCH=kukui
TEST=DDR boot up correctly on Kukui
Signed-off-by: Shaoming Chen <shaoming.chen@mediatek.corp-partner.google.com>
Change-Id: I1786c1e251e8d6e110cbdce79feeb386db220404
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49108
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c')
| -rw-r--r-- | src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c index 26b12bfea399..5248db99b797 100644 --- a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c @@ -5,6 +5,7 @@ struct sdram_params params = { .source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG, .frequency = 1600, + .rank_num = 2, .ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2, .wr_level = { [CHANNEL_A] = { {0x1F, 0x19}, {0x20, 0x1A} }, |