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| author | Peter Lemenkov <lemenkov@gmail.com> | 2019-06-15 21:39:32 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-18 13:48:43 +0000 |
| commit | 6752b61514609efd55e7d248b7c3c7127ee43693 (patch) | |
| tree | 7ceaae627f48f4fdc679ff64694d5165f97fc810 /src/mainboard/google/link/gpio.c | |
| parent | 915327136858d5412c9c02bf0730578e87101d59 (diff) | |
| download | coreboot-6752b61514609efd55e7d248b7c3c7127ee43693.tar.gz coreboot-6752b61514609efd55e7d248b7c3c7127ee43693.tar.bz2 coreboot-6752b61514609efd55e7d248b7c3c7127ee43693.zip | |
mb/*/*/gpio: Use static for const structures
Autoport generates these structures as static so let's make it consistent.
See also commit 128205fd with Change-Id
I83382d38a4a3b7ed11b8e7077cc5fbe154e261a7 ("autoport/bd82x6x.go: Improve
gpio.c generation").
Change-Id: I4e07bd755ca4a65b76c69625d235a879fe7b43cb
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33524
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/link/gpio.c')
| -rw-r--r-- | src/mainboard/google/link/gpio.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/link/gpio.c b/src/mainboard/google/link/gpio.c index dcd29a33c64f..035cf6da3fa9 100644 --- a/src/mainboard/google/link/gpio.c +++ b/src/mainboard/google/link/gpio.c @@ -18,7 +18,7 @@ #include <southbridge/intel/common/gpio.h> -const struct pch_gpio_set1 pch_gpio_set1_mode = { +static const struct pch_gpio_set1 pch_gpio_set1_mode = { .gpio0 = GPIO_MODE_GPIO, /* NMI_DBG# */ .gpio3 = GPIO_MODE_GPIO, /* ALS_INT# */ .gpio5 = GPIO_MODE_GPIO, /* SIM_DET */ @@ -35,7 +35,7 @@ const struct pch_gpio_set1 pch_gpio_set1_mode = { .gpio28 = GPIO_MODE_GPIO, /* SLP_ME_CSW_DEV# */ }; -const struct pch_gpio_set1 pch_gpio_set1_direction = { +static const struct pch_gpio_set1 pch_gpio_set1_direction = { .gpio0 = GPIO_DIR_INPUT, .gpio3 = GPIO_DIR_INPUT, .gpio5 = GPIO_DIR_INPUT, @@ -52,13 +52,13 @@ const struct pch_gpio_set1 pch_gpio_set1_direction = { .gpio28 = GPIO_DIR_INPUT, }; -const struct pch_gpio_set1 pch_gpio_set1_level = { +static const struct pch_gpio_set1 pch_gpio_set1_level = { .gpio1 = GPIO_LEVEL_HIGH, .gpio6 = GPIO_LEVEL_HIGH, .gpio24 = GPIO_LEVEL_LOW, }; -const struct pch_gpio_set1 pch_gpio_set1_invert = { +static const struct pch_gpio_set1 pch_gpio_set1_invert = { .gpio7 = GPIO_INVERT, .gpio8 = GPIO_INVERT, .gpio12 = GPIO_INVERT, @@ -66,7 +66,7 @@ const struct pch_gpio_set1 pch_gpio_set1_invert = { .gpio15 = GPIO_INVERT, }; -const struct pch_gpio_set2 pch_gpio_set2_mode = { +static const struct pch_gpio_set2 pch_gpio_set2_mode = { .gpio36 = GPIO_MODE_GPIO, /* W_DISABLE_L */ .gpio41 = GPIO_MODE_GPIO, /* SPD vector D0 */ .gpio42 = GPIO_MODE_GPIO, /* SPD vector D1 */ @@ -75,7 +75,7 @@ const struct pch_gpio_set2 pch_gpio_set2_mode = { .gpio60 = GPIO_MODE_GPIO, /* DRAMRST_CNTRL_PCH */ }; -const struct pch_gpio_set2 pch_gpio_set2_direction = { +static const struct pch_gpio_set2 pch_gpio_set2_direction = { .gpio36 = GPIO_DIR_OUTPUT, .gpio41 = GPIO_DIR_INPUT, .gpio42 = GPIO_DIR_INPUT, @@ -84,18 +84,18 @@ const struct pch_gpio_set2 pch_gpio_set2_direction = { .gpio60 = GPIO_DIR_OUTPUT, }; -const struct pch_gpio_set2 pch_gpio_set2_level = { +static const struct pch_gpio_set2 pch_gpio_set2_level = { .gpio36 = GPIO_LEVEL_HIGH, .gpio60 = GPIO_LEVEL_HIGH, }; -const struct pch_gpio_set3 pch_gpio_set3_mode = { +static const struct pch_gpio_set3 pch_gpio_set3_mode = { }; -const struct pch_gpio_set3 pch_gpio_set3_direction = { +static const struct pch_gpio_set3 pch_gpio_set3_direction = { }; -const struct pch_gpio_set3 pch_gpio_set3_level = { +static const struct pch_gpio_set3 pch_gpio_set3_level = { }; const struct pch_gpio_map mainboard_gpio_map = { |