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| author | Jon Murphy <jpmurphy@google.com> | 2023-06-08 14:57:51 -0600 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-06-13 23:55:27 +0000 |
| commit | 86e05e8e7309a927271d5dbeca5c83d3a74fe513 (patch) | |
| tree | 21f43c3032c63b27eb845e75c1a4c7b49977eb32 /src/mainboard/google/myst/port_descriptors.c | |
| parent | 7866166fb4e841f69e0ee73c6e7b2f4ed2ffd542 (diff) | |
| download | coreboot-86e05e8e7309a927271d5dbeca5c83d3a74fe513.tar.gz coreboot-86e05e8e7309a927271d5dbeca5c83d3a74fe513.tar.bz2 coreboot-86e05e8e7309a927271d5dbeca5c83d3a74fe513.zip | |
mb/google/myst: Update PCIe romstage gpios
Update PCIe GPIOs during rom stage to properly initialize the
PCIe devices and allow the NVMe/eMMC to be properly detected.
BUG=b:284213391
TEST=Boot to OS
Change-Id: I24ad6c1addedb414afade2512b6628022d000a47
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75699
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/myst/port_descriptors.c')
| -rw-r--r-- | src/mainboard/google/myst/port_descriptors.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/myst/port_descriptors.c b/src/mainboard/google/myst/port_descriptors.c index 108dd4e6395b..6d0d0d6ff98a 100644 --- a/src/mainboard/google/myst/port_descriptors.c +++ b/src/mainboard/google/myst/port_descriptors.c @@ -54,8 +54,6 @@ static const fsp_dxio_descriptor emmc_descriptor = { .function_number = PCI_FUNC(NVME_DEVFN), .link_speed_capability = GEN_MAX, .turn_off_unused_lanes = true, - /* TODO(b/284213391): Fix PCIe shutdown */ - .link_hotplug = 3, .clk_req = CLK_REQ3, }; @@ -68,8 +66,6 @@ static const fsp_dxio_descriptor nvme_descriptor = { .function_number = PCI_FUNC(NVME_DEVFN), .link_speed_capability = GEN_MAX, .turn_off_unused_lanes = true, - /* TODO(b/284213391): Fix PCIe shutdown */ - .link_hotplug = 3, .clk_req = CLK_REQ3, }; |