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authorTom Warren <twarren@nvidia.com>2014-03-19 14:19:09 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-11-14 07:27:06 +0100
commit4e16a2ea17a1b104507aeed8fca9c35750728248 (patch)
tree9c5d36460eddd73a282b0ff98e4a8f0824a09150 /src/mainboard/google/nyan_blaze/chromeos.c
parent764cd1bb3aa7733dbaaabc5b42ec096960975d5b (diff)
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blaze: Create a nyan_blaze mainboard, copied from nyan_big
The nyan_blaze board will have different BCT .inc files, to be added/updated later. GPIOs and some devicetree stuff may also differ. BUG=None TEST=Built nyan, nyan_big and nyan_blaze. BRANCH=None Original-Change-Id: I8b16fc71346cf973983aa046096b79cb83ad4bb6 Original-Signed-off-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/190721 Original-Reviewed-by: Gabe Black <gabeblack@chromium.org> Original-Tested-by: Julius Werner <jwerner@chromium.org> (cherry picked from commit bea753131e2247a90cc5359fa5f603026d66c7ce) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I435ae78da2f6c4f1a78fea8300b6285e52272535 Reviewed-on: http://review.coreboot.org/7453 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/mainboard/google/nyan_blaze/chromeos.c')
-rw-r--r--src/mainboard/google/nyan_blaze/chromeos.c103
1 files changed, 103 insertions, 0 deletions
diff --git a/src/mainboard/google/nyan_blaze/chromeos.c b/src/mainboard/google/nyan_blaze/chromeos.c
new file mode 100644
index 000000000000..16f0c9878ea8
--- /dev/null
+++ b/src/mainboard/google/nyan_blaze/chromeos.c
@@ -0,0 +1,103 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <boot/coreboot_tables.h>
+#include <console/console.h>
+#include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/ec_commands.h>
+#include <string.h>
+#include <vendorcode/google/chromeos/chromeos.h>
+#include <soc/nvidia/tegra124/gpio.h>
+
+//enum {
+// ACTIVE_LOW = 0,
+// ACTIVE_HIGH = 1
+//};
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+ int count = 0;
+
+ /* Write Protect: active low */
+ gpios->gpios[count].port = GPIO_R1_INDEX;
+ gpios->gpios[count].polarity = ACTIVE_LOW;
+ gpios->gpios[count].value = gpio_get_in_value(GPIO(R1));
+ strncpy((char *)gpios->gpios[count].name, "write protect",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Recovery: active high */
+ gpios->gpios[count].port = -1;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = get_recovery_mode_switch();
+ strncpy((char *)gpios->gpios[count].name, "recovery",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Lid: active high */
+ gpios->gpios[count].port = GPIO_R4_INDEX;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = gpio_get_in_value(GPIO(R4));
+ strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Power: active low */
+ gpios->gpios[count].port = GPIO_Q0_INDEX;
+ gpios->gpios[count].polarity = ACTIVE_LOW;
+ gpios->gpios[count].value = gpio_get_in_value(GPIO(Q0));
+ strncpy((char *)gpios->gpios[count].name, "power",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Developer: virtual GPIO active high */
+ gpios->gpios[count].port = -1;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = get_developer_mode_switch();
+ strncpy((char *)gpios->gpios[count].name, "developer",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
+ gpios->count = count;
+
+ printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
+}
+
+int get_developer_mode_switch(void)
+{
+ return 0;
+}
+
+int get_recovery_mode_switch(void)
+{
+ uint32_t ec_events;
+
+ /* The GPIO is active low. */
+ if (!gpio_get_in_value(GPIO(Q7))) // RECMODE_GPIO
+ return 1;
+
+ ec_events = google_chromeec_get_events_b();
+ return !!(ec_events &
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
+}
+
+int get_write_protect_state(void)
+{
+ return !gpio_get_in_value(GPIO(R1));
+}