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authorJulius Werner <jwerner@chromium.org>2014-10-20 13:18:56 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-07 18:48:30 +0200
commit80af442cd21eaa924840614b00c082b9b29abff1 (patch)
tree2fa3894a6a1a6e9d3e426275755b1614cf84abb5 /src/mainboard/google/peach_pit/mainboard.c
parent1ed0c8c0b221962855b6f547cc663c506b9cb5c6 (diff)
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exynos5420: Change all SoC headers to <soc/headername.h> system
This patch aligns exynos5420 to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Peach_Pit. Change-Id: If97b40101d3541a81bca302a9bd64b84a04ff24a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 570ca9ed6337d622781f37184b2cd7209de0083f Original-Change-Id: I338559564e57bdc5202d34c7173ce0d075ad2afc Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224501 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9324 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/peach_pit/mainboard.c')
-rw-r--r--src/mainboard/google/peach_pit/mainboard.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/src/mainboard/google/peach_pit/mainboard.c b/src/mainboard/google/peach_pit/mainboard.c
index b6f49e294227..fb37cde6d449 100644
--- a/src/mainboard/google/peach_pit/mainboard.c
+++ b/src/mainboard/google/peach_pit/mainboard.c
@@ -17,30 +17,30 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <string.h>
+#include <arch/cache.h>
+#include <boot/coreboot_tables.h>
+#include <cbmem.h>
#include <console/console.h>
+#include <delay.h>
#include <device/device.h>
#include <device/i2c.h>
-#include <cbmem.h>
-#include <delay.h>
-#include <edid.h>
-#include <vbe.h>
-#include <boot/coreboot_tables.h>
-#include <arch/cache.h>
-#include <soc/samsung/exynos5420/tmu.h>
-#include <soc/samsung/exynos5420/clk.h>
-#include <soc/samsung/exynos5420/cpu.h>
-#include <soc/samsung/exynos5420/gpio.h>
-#include <soc/samsung/exynos5420/power.h>
-#include <soc/samsung/exynos5420/periph.h>
-#include <soc/samsung/exynos5420/i2c.h>
-#include <soc/samsung/exynos5420/dp.h>
-#include <soc/samsung/exynos5420/fimd.h>
-#include <soc/samsung/exynos5420/usb.h>
#include <drivers/parade/ps8625/ps8625.h>
#include <ec/google/chromeec/ec.h>
+#include <edid.h>
+#include <soc/tmu.h>
+#include <soc/clk.h>
+#include <soc/cpu.h>
+#include <soc/gpio.h>
+#include <soc/power.h>
+#include <soc/periph.h>
+#include <soc/i2c.h>
+#include <soc/dp.h>
+#include <soc/fimd.h>
+#include <soc/usb.h>
#include <stdlib.h>
+#include <string.h>
#include <symbols.h>
+#include <vbe.h>
/* convenient shorthand (in MB) */
#define DRAM_START ((uintptr_t)_dram/MiB)