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| author | Subrata Banik <subrata.banik@intel.com> | 2019-08-01 10:50:35 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-08-02 04:34:18 +0000 |
| commit | c077b2274b661fb57ffed66b105ece88e30c73b2 (patch) | |
| tree | 215148906dd7d3edf8ac1caa9c41d089959747d0 /src/mainboard/google/poppy/variants/atlas/devicetree.cb | |
| parent | 92dc39129156307913dbf3c07f926554f0c14ab8 (diff) | |
| download | coreboot-c077b2274b661fb57ffed66b105ece88e30c73b2.tar.gz coreboot-c077b2274b661fb57ffed66b105ece88e30c73b2.tar.bz2 coreboot-c077b2274b661fb57ffed66b105ece88e30c73b2.zip | |
soc/intel/skylake: Make use of common thermal code for SKL
This patch ensures skylake soc is using common thermal code
from intel common block.
TEST=Build and boot soraka
Change-Id: I0812daa3536051918ccac973fde8d7f4f949609d
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34648
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/poppy/variants/atlas/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/poppy/variants/atlas/devicetree.cb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 7fcb3b8b3e34..ac86e79f22d7 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -64,7 +64,6 @@ chip soc/intel/skylake register "tdp_pl2_override" = "15" register "psys_pmax" = "45" register "tcc_offset" = "10" - register "pch_trip_temp" = "75" register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" @@ -182,6 +181,7 @@ chip soc/intel/skylake #| I2C2 | Trackpad | #| I2C3 | Camera | #| I2C4 | Audio | + #| pch_thermal_trip | PCH Trip Temperature | #+-------------------+---------------------------+ register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, @@ -217,6 +217,7 @@ chip soc/intel/skylake .speed_mhz = 1, .early_init = 1, }, + .pch_thermal_trip = 75, }" # Touchscreen register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" |