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| author | Matt Delco <delco@chromium.org> | 2018-08-13 21:42:09 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-15 09:38:18 +0000 |
| commit | d7decb82442e0ef7557aa247b4a5a8e56f28b6c2 (patch) | |
| tree | 165884d7c84ef20bb4e5f8dd5bc2252856b413fc /src/mainboard/google/poppy/variants/nocturne/devicetree.cb | |
| parent | b4be7aa09346d082bbb0e55c773635cc08a8a233 (diff) | |
| download | coreboot-d7decb82442e0ef7557aa247b4a5a8e56f28b6c2.tar.gz coreboot-d7decb82442e0ef7557aa247b4a5a8e56f28b6c2.tar.bz2 coreboot-d7decb82442e0ef7557aa247b4a5a8e56f28b6c2.zip | |
mb/google/poppy/variants/nocturne: remove dup'ed dptf_enable
This file contains two instances of "dptf_enable" = "1". This change
removes the 2nd instance (it doesn't have an explicit comment like the
1st instance).
The dptf devices still seem to be present even with this change, as
expected.
Change-Id: I890006644be9176ebaf555cc121c816e12f2b596
Signed-off-by: Matt Delco <delco@chromium.org>
Reviewed-on: https://review.coreboot.org/28076
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/poppy/variants/nocturne/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 4fbd0ff73e91..88af9294d5af 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -61,7 +61,6 @@ chip soc/intel/skylake # Set speed_shift_enable to 1 to enable P-States, and 0 to disable register "speed_shift_enable" = "1" - register "dptf_enable" = "1" register "tdp_pl2_override" = "18" register "psys_pmax" = "45" register "tcc_offset" = "10" |