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| author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | 2024-01-24 14:53:28 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-25 20:57:16 +0000 |
| commit | 4f76170819550bfc52bfbd4de0e755d4ea5e4858 (patch) | |
| tree | 200923a1af4da11c7f324c6a10a495801eee2846 /src/mainboard/google/rex | |
| parent | 5844b23c3fc42816ee890707d5aee1b1c08ada6a (diff) | |
| download | coreboot-4f76170819550bfc52bfbd4de0e755d4ea5e4858.tar.gz coreboot-4f76170819550bfc52bfbd4de0e755d4ea5e4858.tar.bz2 coreboot-4f76170819550bfc52bfbd4de0e755d4ea5e4858.zip | |
mb/google/rex/variants/deku: update USB-C port configuration
This CL update setting according to schematic v0.4.
BUG=b:320201111
BRANCH=firmware-rex-15709.B
TEST=Built FW image correctly.
Change-Id: Ia4570d26ee9fd175ed9099bd057cee3c30c95704
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80156
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eran Mitrani <mitrani@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
Diffstat (limited to 'src/mainboard/google/rex')
| -rw-r--r-- | src/mainboard/google/rex/variants/deku/overridetree.cb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb index 9c35338c271e..711d3b67db89 100644 --- a/src/mainboard/google/rex/variants/deku/overridetree.cb +++ b/src/mainboard/google/rex/variants/deku/overridetree.cb @@ -117,21 +117,21 @@ chip soc/intel/meteorlake register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(2, 1))" - device ref tcss_usb3_port1 on end + device ref tcss_usb3_port2 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(3, 1))" - device ref tcss_usb3_port2 on end + device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C3"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))" - device ref tcss_usb3_port2 on end + device ref tcss_usb3_port3 on end end end end @@ -156,7 +156,7 @@ chip soc/intel/meteorlake end chip drivers/intel/usb4/retimer register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)" - use tcss_usb3_port3 as dfp[0].typec_port + use tcss_usb3_port3 as dfp[1].typec_port device generic 0 on end end end @@ -298,7 +298,7 @@ chip soc/intel/meteorlake chip drivers/intel/pmc_mux/conn #USB2_C3 use usb2_port5 as usb2_port - use tcss_usb3_port1 as usb3_port + use tcss_usb3_port3 as usb3_port device generic 3 alias conn3 on end end end |