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author | Jon Murphy <jpmurphy@google.com> | 2022-02-17 22:42:57 -0700 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-10 23:22:33 +0000 |
commit | 9df00851938eeb227fd019be8d0866655414f62e (patch) | |
tree | fe3b03ffb61402064d022bc5de16876dbff32e81 /src/mainboard/google/skyrim/variants/baseboard/gpio.c | |
parent | d42d8ea0a27a040c37da78992e0d62ec464b7c85 (diff) | |
download | coreboot-9df00851938eeb227fd019be8d0866655414f62e.tar.gz coreboot-9df00851938eeb227fd019be8d0866655414f62e.tar.bz2 coreboot-9df00851938eeb227fd019be8d0866655414f62e.zip |
mb/google/skyrim: Configure WLAN
Configure PCIe Clk Source and Clk Request mapping. Configure GPIOs used
for WLAN. Mappping derived from Skyrim schematic.
BUG=b:214412172
TEST=Builds
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I16e35b443f741d366589fefb7fd21863369d1ec2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62165
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/skyrim/variants/baseboard/gpio.c')
-rw-r--r-- | src/mainboard/google/skyrim/variants/baseboard/gpio.c | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/gpio.c b/src/mainboard/google/skyrim/variants/baseboard/gpio.c index dd30475beb3a..f0956512973d 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/gpio.c +++ b/src/mainboard/google/skyrim/variants/baseboard/gpio.c @@ -155,16 +155,37 @@ static const struct soc_amd_gpio sleep_gpio_table[] = { /* TODO: Fill sleep gpio configuration */ }; -/* Early GPIO configuration in bootblock */ +/* GPIO configuration in bootblock */ static const struct soc_amd_gpio bootblock_gpio_table[] = { - /* TODO: Fill bootblock gpio configuration */ + /* Enable WLAN */ + /* WLAN_DISABLE */ + PAD_GPO(GPIO_21, LOW), }; /* Early GPIO configuration */ static const struct soc_amd_gpio early_gpio_table[] = { - /* TODO: Fill early gpio configuration */ + /* WLAN_AUX_RESET_L (ACTIVE LOW) */ + PAD_GPO(GPIO_7, LOW), + /* Power on WLAN */ + /* EN_PP3300_WLAN */ + PAD_GPO(GPIO_9, HIGH), +}; + +/* PCIE_RST needs to be brought high before FSP-M runs */ +static const struct soc_amd_gpio pcie_gpio_table[] = { + /* Deassert all AUX_RESET lines & PCIE_RST */ + /* WLAN_AUX_RESET_L (ACTIVE LOW) */ + PAD_GPO(GPIO_7, HIGH), + /* PCIE_RST0_L */ + PAD_NFO(GPIO_26, PCIE_RST0_L, HIGH), }; +__weak void variant_pcie_gpio_table(const struct soc_amd_gpio **gpio, size_t *size) +{ + *size = ARRAY_SIZE(pcie_gpio_table); + *gpio = pcie_gpio_table; +} + __weak void variant_base_gpio_table(const struct soc_amd_gpio **gpio, size_t *size) { *size = ARRAY_SIZE(base_gpio_table); |