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| author | Raul E Rangel <rrangel@chromium.org> | 2022-08-10 12:31:38 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-01 16:57:03 +0000 |
| commit | e5db74070b6c8026799a8d1b2cd93de5e0011a76 (patch) | |
| tree | df6467855ff25d290beb00c5cb988327843bd3b8 /src/mainboard/google/skyrim/variants/skyrim | |
| parent | 3cff98a0e29cbbab6a4d1788f9695fcf8060584d (diff) | |
| download | coreboot-e5db74070b6c8026799a8d1b2cd93de5e0011a76.tar.gz coreboot-e5db74070b6c8026799a8d1b2cd93de5e0011a76.tar.bz2 coreboot-e5db74070b6c8026799a8d1b2cd93de5e0011a76.zip | |
mb/google/skyrim: Add missing USB ports to device tree
As part of investigating b/240690391 I noticed that we were missing
the daughter board ports. Not all SKUs have these ports connected,
but it doesn't hurt to have the extra ACPI nodes.
BUG=none
TEST=build
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Id6fc34acbfa30bc15e697043bf93bcf584256128
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66605
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Diffstat (limited to 'src/mainboard/google/skyrim/variants/skyrim')
| -rw-r--r-- | src/mainboard/google/skyrim/variants/skyrim/overridetree.cb | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb index 80bc8ac8c621..945ea19e5da4 100644 --- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb @@ -40,7 +40,7 @@ chip soc/amd/mendocino register "port_count" = "4" device usb 0.0 on # VL822 USB3 hub chip drivers/usb/acpi - register "desc" = ""USB3 Type-A Port A0 (DB)"" + register "desc" = ""USB3 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))" @@ -57,6 +57,13 @@ chip soc/amd/mendocino register "enable_delay_ms" = "20" device usb 3.1 on end end + chip drivers/usb/acpi + register "desc" = ""USB3 Type-A Port A1 (DB)"" + register "type" = "UPC_TYPE_USB3_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, CENTER, ACPI_PLD_GROUP(3, 1))" + device usb 3.2 on end + end end # VL822 USB3 hub end end # USB 3.1 port3 @@ -69,7 +76,7 @@ chip soc/amd/mendocino register "port_count" = "4" device usb 0.0 on # VL822 USB2 hub chip drivers/usb/acpi - register "desc" = ""USB2 Type-A Port A0 (DB)"" + register "desc" = ""USB2 Type-A Port A0 (MLB)"" register "type" = "UPC_TYPE_USB3_A" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))" @@ -81,6 +88,13 @@ chip soc/amd/mendocino register "group" = "ACPI_PLD_GROUP(2, 2)" device usb 2.1 on end end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Port A1 (DB)"" + register "type" = "UPC_TYPE_USB3_A" + register "use_custom_pld" = "true" + register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, CENTER, ACPI_PLD_GROUP(3, 1))" + device usb 2.2 on end + end end # VL822 USB2 hub end end # USB 2 port3 |