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| author | EricKY Cheng <ericky_cheng@compal.corp-partner.google.com> | 2023-04-20 17:21:24 +0800 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2023-04-26 18:23:00 +0000 |
| commit | 09eab1f1a476e62a6e2f02b5a6ab90322481bb50 (patch) | |
| tree | abe028c65dd882fef2acdc436e39256f1bde093b /src/mainboard/google/skyrim | |
| parent | 2ee716227e663f9a8285de373383024671d37380 (diff) | |
| download | coreboot-09eab1f1a476e62a6e2f02b5a6ab90322481bb50.tar.gz coreboot-09eab1f1a476e62a6e2f02b5a6ab90322481bb50.tar.bz2 coreboot-09eab1f1a476e62a6e2f02b5a6ab90322481bb50.zip | |
mb/google/skyrim/var/winterhold: Change to read the eMMC clkreq instead
Because WD SSD drive isn't holding the clock low for some reason.
So we change to read eMMC clkreq signal instead.
BRANCH=none
BUG=b:274377518
TEST=emerge-skyrim coreboot chromeos-bootimage and verify ok.
Change-Id: I1329386631dc54209db54ac146e4aafe95b6a3ac
Signed-off-by: Rex Chou <rex_chou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74599
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Van Patten <timvp@google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/skyrim')
| -rw-r--r-- | src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c b/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c index 330fc46a926d..94eb465edfce 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c +++ b/src/mainboard/google/skyrim/variants/winterhold/port_descriptors.c @@ -74,7 +74,7 @@ static const fsp_dxio_descriptor nvme_dxio_descriptors[] = { }, }; -#define NVME_CLKREQ_GPIO 92 +#define EMMC_CLKREQ_GPIO 115 void variant_get_dxio_descriptor(const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num) { /* @@ -85,13 +85,13 @@ void variant_get_dxio_descriptor(const fsp_dxio_descriptor **dxio_descs, size_t * This allows checking the state of the NVMe device clkreq signal and enabling * either eMMC or NVMe based on that. */ - if (gpio_get(NVME_CLKREQ_GPIO)) { - printk(BIOS_DEBUG, "Enabling eMMC.\n"); - *dxio_num = ARRAY_SIZE(emmc_dxio_descriptors); - *dxio_descs = emmc_dxio_descriptors; - } else { + if (gpio_get(EMMC_CLKREQ_GPIO)) { printk(BIOS_DEBUG, "Enabling NVMe.\n"); *dxio_num = ARRAY_SIZE(nvme_dxio_descriptors); *dxio_descs = nvme_dxio_descriptors; + } else { + printk(BIOS_DEBUG, "Enabling eMMC.\n"); + *dxio_num = ARRAY_SIZE(emmc_dxio_descriptors); + *dxio_descs = emmc_dxio_descriptors; } } |