ipq806x: Add support for mmu in bootblock.

move mmu setup from RAM stage to boot block

Enabling mmu earlier, helps speed up the boot time.

BRANCH=storm
BUG=chrome-os-partner:35024
TEST=Verified the mmu table dump matches the programmed values.

Change-Id: I8f581538d5dfd0d78538c9fe50f689d54b740685
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fb799a6d61f9c2f478434a71584d0edb94af4b59
Original-Change-Id: I110497875002a88add7eb4312a70c0de8c28bc4f
Original-Signed-off-by: Deepa Dinamani <deepad@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/247120
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Trevor Bourget <tbourget@codeaurora.org>
Reviewed-on: http://review.coreboot.org/9756
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 67 insertions, 0 deletions

diff --git a/src/mainboard/google/storm/mmu.c b/src/mainboard/google/storm/mmu.c
new file mode 100644
index 000000000000..47e3b09789ba
--- /dev/null
+++ b/src/mainboard/google/storm/mmu.c
@@ -0,0 +1,67 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/cache.h>
+#include <symbols.h>
+#include "mmu.h"
+
+/* convenient shorthand (in MB) */
+#define RPM_START           ((uintptr_t)_rpm / KiB)
+#define RPM_END             ((uintptr_t)_erpm / KiB)
+#define RPM_SIZE            (RPM_END - RPM_START)
+#define SRAM_START          ((uintptr_t)_sram / KiB)
+#define SRAM_END            ((uintptr_t)_esram / KiB)
+#define DRAM_START          ((uintptr_t)_dram / MiB)
+#define DRAM_SIZE           (CONFIG_DRAM_SIZE_MB)
+#define DRAM_END            (DRAM_START + DRAM_SIZE)
+
+/* DMA memory for drivers */
+#define DMA_START            ((uintptr_t)_dma_coherent / MiB)
+#define DMA_SIZE             (_dma_coherent_size / MiB)
+
+void setup_dram_mappings(enum dram_state dram)
+{
+	if (dram == DRAM_INITIALIZED) {
+		mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
+		/* Map DMA memory */
+		mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
+	} else {
+		mmu_disable_range(DRAM_START, DRAM_SIZE);
+		/* Map DMA memory */
+		mmu_disable_range(DMA_START, DMA_SIZE);
+	}
+}
+
+void setup_mmu(enum dram_state dram)
+{
+	dcache_mmu_disable();
+
+	/* start with mapping everything as strongly ordered. */
+	mmu_config_range(0, 4096, DCACHE_OFF);
+
+	/* Map Device memory. */
+	mmu_config_range_kb(RPM_START, RPM_SIZE, DCACHE_OFF);
+
+	/* TODO: disable Page 0 for trapping NULL pointer references. */
+
+	mmu_config_range_kb(SRAM_START, SRAM_END - SRAM_START,
+		DCACHE_WRITEBACK);
+
+	/* Map DRAM memory */
+	setup_dram_mappings(dram);
+
+	mmu_disable_range(DRAM_END, 4096 - DRAM_END);
+
+	mmu_init();
+
+	dcache_mmu_enable();
+}