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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-12-29 06:26:21 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-01-18 07:21:34 +0000
commit661ad4666ca0e78195f6901fce7b44a7e56e6331 (patch)
tree57c25cee551ec747dcfdf0e38f995a091d5fcd79 /src/mainboard/google/stout
parent286a0572e75ade325238617d15c136f74c4f67a4 (diff)
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ACPI: Select ACPI_SOC_NVS only where suitable
Having some symmetry with <soc/nvs.h> now allows to reduce the amount of gluelogic to determine the size and cbmc field of struct global_nvs. Since GNVS creation is now controlled by ACPI_SOC_NVS, drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne cannot have this selected until <soc/nvs.h> exists. Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lance Zhao
Diffstat (limited to 'src/mainboard/google/stout')
-rw-r--r--src/mainboard/google/stout/acpi_tables.c2
-rw-r--r--src/mainboard/google/stout/mainboard_smi.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c
index 88ff2aecd367..fe12e30ccdde 100644
--- a/src/mainboard/google/stout/acpi_tables.c
+++ b/src/mainboard/google/stout/acpi_tables.c
@@ -9,7 +9,7 @@
#include "onboard.h"
#include <southbridge/intel/bd82x6x/pch.h>
-#include <southbridge/intel/bd82x6x/nvs.h>
+#include <soc/nvs.h>
#include "thermal.h"
void mainboard_fill_gnvs(struct global_nvs *gnvs)
diff --git a/src/mainboard/google/stout/mainboard_smi.c b/src/mainboard/google/stout/mainboard_smi.c
index ef4b4cd1cadf..d282bc7f2377 100644
--- a/src/mainboard/google/stout/mainboard_smi.c
+++ b/src/mainboard/google/stout/mainboard_smi.c
@@ -4,7 +4,7 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
-#include <southbridge/intel/bd82x6x/nvs.h>
+#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/pmbase.h>