summaryrefslogtreecommitdiffstats
path: root/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
diff options
context:
space:
mode:
authorMAULIK V VAGHELA <maulik.v.vaghela@intel.com>2021-08-12 23:08:51 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-08-16 15:00:49 +0000
commit05172526beeea33bb21d8b190a585992ded6f10c (patch)
tree7043ee3acf6e5b3aeed8087e8953eb947020ac47 /src/mainboard/google/volteer/variants/baseboard/devicetree.cb
parentb33623355eed2e9ab4092eaa20440af4ffe20da1 (diff)
downloadcoreboot-05172526beeea33bb21d8b190a585992ded6f10c.tar.gz
coreboot-05172526beeea33bb21d8b190a585992ded6f10c.tar.bz2
coreboot-05172526beeea33bb21d8b190a585992ded6f10c.zip
mb/*/{tglrvp,volteer,deltaur}: Remove hardcoding of BSP APIC ID
coreboot always assumes that BSP APIC ID will be 0 and core enumeration logic will look for lapic id from the mainboard. As per Intel 64 and IA-32 Architectures Software Developer’s Manual Volume 3: 8.4.1 BSP and AP Processors, this assumption might not hold true and we may have any other core as BSP. To handle this, we need to remove hardcoding of APIC ID 0 from mainboard. BUG=None BRANCH=None TEST=Check if there is no functional impact on the board. Change-Id: I175ae26f934f08e125bea7cc3195bdb5792c2360 Signed-off-by: MAULIK V VAGHELA <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56954 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/baseboard/devicetree.cb')
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/devicetree.cb4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index e2a84f81380f..abb8bdc34d70 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -79,9 +79,7 @@ end
chip soc/intel/tigerlake
- device cpu_cluster 0 on
- device lapic 0 on end
- end
+ device cpu_cluster 0 on end
# GPE configuration
# Note that GPE events called out in ASL code rely on this